How to Reduce the Logic?

[himassk]

Hi,



1. I have to get 48 bit output from one of my synthesizable block,So I
declared as
output [47:0]Command;

reg [47:0]Command;
and the synthesis report of this block is


Selected Device : 3s50vq100-5

Number of Slices: 51 out of 768 6%
Number of Slice Flip Flops: 4 out of 1536 0%
Number of 4 input LUTs: 89 out of 1536 5%
Number of bonded IOBs: 70 out of 63 111% (*)
Number of GCLKs: 1 out of 8 12%

2. So I used one temperory internal register and assigned to the
output, still I got the same result:

output [47:0]Command;

wire [47:0]Command;

reg [47:0]Temp;

assign Command = Temp;


Selected Device : 3s50vq100-5

Number of Slices: 51 out of 768 6%
Number of Slice Flip Flops: 4 out of 1536 0%
Number of 4 input LUTs: 89 out of 1536 5%
Number of bonded IOBs: 70 out of 63 111% (*)
Number of GCLKs: 1 out of 8 12%


3. Then I removed the output and used only the internal register, then
I got the good result:

reg [47:0]Command;


Selected Device : 3s50vq100-5

Number of Slices: 4 out of 768 0%
Number of Slice Flip Flops: 4 out of 1536 0%
Number of 4 input LUTs: 8 out of 1536 0%
Number of bonded IOBs: 22 out of 63 34%
Number of GCLKs: 1 out of 8 12%


If use Command as only internal register then the logic is less and
its utilizing less LUTs.
If I make it as output then there is more logic and more LUTs
utilization.But I need to get the Command as
48 bit output with less LUTs utilization. Is there any other
approach to get Command as output with less logic.


Please suggest me.

Best Regards,
HimaSSK