how to read an image from the PC and store it in FPGA ROM

[rizi]

Hi

i am working on FPGAs.
As i am new in vhdl so i do not know how to deal with images in vhdl.
i want to read an image that is already stored in PC.
please can you help me how to read an image from the PC and store it i
FPGA ROM ?
(i want to do this in verilog or vhdl)

your suggestion will be appreciated.

Thank you
Rizi



---------------------------------------
Posted through http://www.FPGARelated.com

 

[backhus]

On 25 Jan., 13:44, "rizi" <cyclon786@n_o_s_p_a_m.gmail.com> wrote:

Hi

i am working on FPGAs.
As i am new in vhdl so i do not know how to deal with images in vhdl.
i want to read an image that is already stored in PC.
please can you help me how to read an image from the PC and store it in
FPGA ROM ?
(i want to do this in verilog or vhdl)

your suggestion will be appreciated.

Thank you
Rizi

---------------------------------------        
Posted throughhttp://www.FPGARelated.com

hi,
search the forum here, or at http://forums.xilinx.com/
This question has been answered a thousand times.

Have a nice synthesis
Eilert

 

[Martin Thompson]

"rizi" <cyclon786@n_o_s_p_a_m.gmail.com> writes:

Hi

i am working on FPGAs.
As i am new in vhdl so i do not know how to deal with images in vhdl.
i want to read an image that is already stored in PC.
please can you help me how to read an image from the PC and store it in
FPGA ROM ?
(i want to do this in verilog or vhdl)

Write a quick script in your favourite scripting language to read the
image (for example, Python and the Python Imaging Library can read
most formats of images).

Your script can then write that image out to a file as a VHDL constant
- you can use an array of integers to store the data.

Finally, create a clocked process which accesses that constant based
on an "address" input. The synthesiser can convert that into a ROM.

your suggestion will be appreciated.

And there you have it...

Thank you

You're welcome.

Cheers,
Martin

--
martin.j.thompson@trw.com
TRW Conekt - Consultancy in Engineering, Knowledge and Technology
http://www.conekt.co.uk/capabilities/39-electronic-hardware

 

[Petter Gustad]

Martin Thompson <martin.j.thompson@trw.com> writes:

Your script can then write that image out to a file as a VHDL constant
- you can use an array of integers to store the data.

Or generate a MIF file or other ROM format supported by your FPGA
vendor. This is usually faster (but not as portable as the above
suggestion) to run through the tool-chain and most FPGA vendors have a
tool which will quickly merge a new version of a ROM file while
everything else being constant.

//Petter
--
..sig removed by request.

 

[Martin Thompson]

Petter Gustad <newsmailcomp6@gustad.com> writes:

Martin Thompson <martin.j.thompson@trw.com> writes:

Your script can then write that image out to a file as a VHDL constant
- you can use an array of integers to store the data.

Or generate a MIF file or other ROM format supported by your FPGA
vendor. This is usually faster (but not as portable as the above
suggestion) to run through the tool-chain and most FPGA vendors have a
tool which will quickly merge a new version of a ROM file while
everything else being constant.

Good point - I tend to lean very heavily towards portable, and forget
about other options! What you suggest is an especially good plan if
the project is likely to need to change the ROM contents frequently.

Cheers,
Martin

--
martin.j.thompson@trw.com
TRW Conekt - Consultancy in Engineering, Knowledge and Technology
http://www.conekt.co.uk/capabilities/39-electronic-hardware