W
Weng Tianxiang
Guest
Hi,
Can you help explain a method to print a state flow graph for any state
machine design written in VHDL using either Xilinx ISE or ModelSim
software?
If neither has the ability of doing the function, what else software
can do it?
Thank you.
Weng
Can you help explain a method to print a state flow graph for any state
machine design written in VHDL using either Xilinx ISE or ModelSim
software?
If neither has the ability of doing the function, what else software
can do it?
Thank you.
Weng