S
srini
Guest
Hi,
When I synthesize my verilog RTL code with Synplify Pro 8.4, I am
getting a note saying that the option to pack flops in IOB has not been
specified. I havent checked the "disable io insertion" option in
Implementation options and thought that it would help but in vain. So,
I would like to know how to pack flops in IOB. I still get a clear
picture of how packing/unpacking of flops in IOB helps the design. If
soomeone can through some light on it, it would be gr8 help to me.
Thanks & Regards,
Srini.
When I synthesize my verilog RTL code with Synplify Pro 8.4, I am
getting a note saying that the option to pack flops in IOB has not been
specified. I havent checked the "disable io insertion" option in
Implementation options and thought that it would help but in vain. So,
I would like to know how to pack flops in IOB. I still get a clear
picture of how packing/unpacking of flops in IOB helps the design. If
soomeone can through some light on it, it would be gr8 help to me.
Thanks & Regards,
Srini.