How to implement Ethernet packet classification with vhdl on

I'm working on implement the basic ethernet switch on FPGA. But I don't know how to parse packet when they enter to switch. I have already used ip core (Ethernet MAC and fifo )to receive and transmit packet. Does any one has vhdl code or referene? Thank you

 

[pini_kr]

I'm working on implement the basic ethernet switch on FPGA. But I don'
kno=
w how to parse packet when they enter to switch. I have already used i
cor=
e (Ethernet MAC and fifo )to receive and transmit packet. Does any one ha
=
vhdl code or referene? Thank you

a few free examples in bknpk vhdl

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