How to generate stimulus of signal "data" which has a setup/

The problem is like this:
i want to make a testbench to test one RAM cell.

A signal "clk" is already known. But i need to generate a signal "data" as stimulus to this RAM cell. "data" has `tSETUP and `tHOLD on "clk".

How should i generate the stimulus for "data"?

thanks in advance.

 

[GaborSzakacs]

zhoulin999@gmail.com wrote:

The problem is like this:
i want to make a testbench to test one RAM cell.

A signal "clk" is already known. But i need to generate a signal "data" as stimulus to this RAM cell. "data" has `tSETUP and `tHOLD on "clk".

How should i generate the stimulus for "data"?

thanks in advance.

Are you asking how to generate a data stimulus that is only valid during
the time required by the RAM cell? You can use multiple non-blocking
assignments on each clock edge to accomplish this.

For example lets say you're clock period is 10 ns and you want to create
a signal that gives 3 ns setup and 2 ns hold to the rising edge of "clk"
with incrementing data on each clock.

reg [WIDTH-1:0] data_tb = 0; // internal data at the clock edge

always @ (posedge clk)
begin
data_tb = data_tb + 1; // Blocking assignment to avoid extra cycle
data <= #2 {WIDTH{1'bX}};// Data goes invalid after hold time
data <= #(10-3) data_tb; // Data becomes valid setup time before
next clk
end

--
Gabor