How to find the ABS of std_logic_vector

[priya]

hi
ABS function which is specified for integer type in VHDL
for slv data type
how to find the absolute value
reply back soon

 

[Ajeetha]

How about:

abs(to_integer(unsigned(my_slv)));


Use ieee.numeric_std package

Try it out and let me know if it works

Ajeetha, CVC
www.noveldv.com

priya wrote:

hi
ABS function which is specified for integer type in VHDL
for slv data type
how to find the absolute value
reply back soon

 

[Ralf Hildebrandt]

priya schrieb:

ABS function which is specified for integer type in VHDL
for slv data type
how to find the absolute value

No one knows, if your std_(u)logic_vector is signed or not. Therefore
there is no such function.

my_abs<=abs( signed(my_stdlogicvector) ); -- using IEEE.numeric_std

Ralf

 

[Andy]

I'm assuming the OP wants an SLV back, so:

my_abs <= std_logic_vector(abs(signed(my_slv)));

Or just use constrained integers or numeric-std.signed/unsigned instead
of slv for the data in the first place, and no conversions would be
necessary.

Andy


Ralf Hildebrandt wrote:

priya schrieb:

ABS function which is specified for integer type in VHDL
for slv data type
how to find the absolute value


No one knows, if your std_(u)logic_vector is signed or not. Therefore
there is no such function.

my_abs<=abs( signed(my_stdlogicvector) ); -- using IEEE.numeric_std

Ralf