How to do with guard bits practically?

J

Jeff

Guest
Hi,
Last time I have posted a question about guard bit in CORDIC
algorithm. I have got some good answers from this goupe. When I
programe in C to do a simulation, I still don't understand how I do
with the guard bits.
From one of the papers talking about implementation of CORDIC, it says
the input is 12 bits, internal data paths are 16 plus extra 6 guard
bits. At the input stage adds 6 all-zero guard bit extension. At the
output stage it erases guard bits. And, it also divides two inputs
number by 2 at first to prevent overflow. The internal data are
represented as signed numbers. My question is:

1. What are the differences between the internal 22 (16+6) bits
calculation and 16 bits data plus 6 guard bits extension? Especially I
want to get an example to make this question clear.
2. If the 6 extra guard bits are MSB, to erase them will not destroy
data? There are 9 stages of CORDIC cells in my application. In my
simulation programe I find the high bit in the last stage is at bit 5
(in the guard bits range when I simply use 22 internal bits with there
are 6 bits leave off at the first input data stage).
3. Which book talks about the guard bit? Could you recommend me some?



Thanks in advance.
 
Sorry for some inaccury description. Following is the corrections.


a. "At every input stage adds 6 all-zero guard bit extension first,
then at its
output it erases all the guard bits."

b. "There are 6 stages of CORDIC cells cascaded in my application."

As my understanding of CORDIC, its vector/rotation is from the MSB.
So, there is no overflow like multiply. I just need consider the
CORDIC rotation gain(1.647)? In this considering, besides the input
data divide 2, why it needs extra 6 guard bits?

BTW, in the reply to my last post, What Ray said about MAC is right. I
found my previous understanding was wrong. In that paper,
multiply-accumulate or divide-accumulate are not performed directly.


Any suggestion is highly appreciated.
 
It sounds like they are calling the added LSBs guard bits. CORDIC has a
gain of 1.647. Assuming the input is left justified, it needs to be right
shifted (divided by 2) to accommodate the gain. I am sure what they are
calling guard bits are extra bits tacked onto the LSBs to absorb the
rounding errors that happen inside the CORDIC as a consequence of the
right shifts (I am also accustomed to 'guard bits' referring to extra sign
bits, not added LSBs).

SO what they are doing is adding extra LSBs to absorb the
truncation/rounding errors that inevitably happen because of the right
shifted cross terms in the CORDIC algorithm, however for 6 iterations, 6
guard bits is excessive. If you look at the maximum error introduced, it
is +/-0.5 at each iteration if the iteration sum/difference is rounded.
Summing that up over the iterations you get a bounded error that is
related to log2(iterations). This can be dealt with by carrying enough
extra precision through the computation to permit you to truncate off the
error at the output.

Jeff wrote:

Sorry for some inaccury description. Following is the corrections.

a. "At every input stage adds 6 all-zero guard bit extension first,
then at its
output it erases all the guard bits."

b. "There are 6 stages of CORDIC cells cascaded in my application."

As my understanding of CORDIC, its vector/rotation is from the MSB.
So, there is no overflow like multiply. I just need consider the
CORDIC rotation gain(1.647)? In this considering, besides the input
data divide 2, why it needs extra 6 guard bits?

BTW, in the reply to my last post, What Ray said about MAC is right. I
found my previous understanding was wrong. In that paper,
multiply-accumulate or divide-accumulate are not performed directly.

Any suggestion is highly appreciated.
--
--Ray Andraka, P.E.
President, the Andraka Consulting Group, Inc.
401/884-7930 Fax 401/884-7950
email ray@andraka.com
http://www.andraka.com

"They that give up essential liberty to obtain a little
temporary safety deserve neither liberty nor safety."
-Benjamin Franklin, 1759
 
Thanks, Ray.
Your reply is always right and accurate. I owe you a lot!
Sorry again for my incomplete description. There are 22 iterations in
our CORDIC cells. So, the 6 LSB guard bits are reasonable.


Have a good day!
 
Where should I send the invoice? ;-)

Glad to have been able to help.

Jeff wrote:

Thanks, Ray.
Your reply is always right and accurate. I owe you a lot!
Sorry again for my incomplete description. There are 22 iterations in
our CORDIC cells. So, the 6 LSB guard bits are reasonable.

Have a good day!
--
--Ray Andraka, P.E.
President, the Andraka Consulting Group, Inc.
401/884-7930 Fax 401/884-7950
email ray@andraka.com
http://www.andraka.com

"They that give up essential liberty to obtain a little
temporary safety deserve neither liberty nor safety."
-Benjamin Franklin, 1759
 

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