How to create a library for a Xilinx project

[Weng Tianxiang]

Hi,
I have a project that have many files generated by Xilinx
CoreGenerator.

Now I put all those vhdl files generated by Xilinx CoreGenerator into
my project.

I want to put those files that never change into a library monitored by
ModelSim software.

I don't know how to create a ModelSim library.

Please help.

Thank you.

Weng

 

You have a 'gmail' address; surely you have heard of Google?

Google search for "modelsim create library". The link you want is the
2nd one.

 

[Jim Wu]

vlib my_cores
vlog -work my_cores core0.v

HTH,
Jim
http://home.comcast.net/~jimwu88/tools/


Weng Tianxiang wrote:

Hi,
I have a project that have many files generated by Xilinx
CoreGenerator.

Now I put all those vhdl files generated by Xilinx CoreGenerator into
my project.

I want to put those files that never change into a library monitored by
ModelSim software.

I don't know how to create a ModelSim library.

Please help.

Thank you.

Weng

 

[Weng Tianxiang]

Jim Wu wrote:

vlib my_cores
vlog -work my_cores core0.v

HTH,
Jim
http://home.comcast.net/~jimwu88/tools/


Weng Tianxiang wrote:
Hi,
I have a project that have many files generated by Xilinx
CoreGenerator.

Now I put all those vhdl files generated by Xilinx CoreGenerator into
my project.

I want to put those files that never change into a library monitored by
ModelSim software.

Hi Wu,
I found the simplest way to create a library for a project while using
ModelSim:
1. Put all necessary *.vhd files into one proejct directory;
2. Compile them without errors;
3. Delete all *.vhd files that are generated by Xilinx CoreGenerator or
something similar;

These deleted *.vhd code are still referenced properly in the work
library and there are no need to generate a separate library.

Any comments?

Thank you.

Weng

I don't know how to create a ModelSim library.

Please help.

Thank you.

Weng

 

[Weng Tianxiang]

Jim Wu wrote:

vlib my_cores
vlog -work my_cores core0.v

HTH,
Jim
http://home.comcast.net/~jimwu88/tools/


Weng Tianxiang wrote:
Hi,
I have a project that have many files generated by Xilinx
CoreGenerator.

Now I put all those vhdl files generated by Xilinx CoreGenerator into
my project.

I want to put those files that never change into a library monitored by
ModelSim software.

I don't know how to create a ModelSim library.

Please help.

Thank you.

Weng

 

[Jim Wu]

I found the simplest way to create a library for a project while using
ModelSim:
1. Put all necessary *.vhd files into one proejct directory;
2. Compile them without errors;
3. Delete all *.vhd files that are generated by Xilinx CoreGenerator or
something similar;

These deleted *.vhd code are still referenced properly in the work
library and there are no need to generate a separate library.

Any comments?

Not sure what you're trying to do. If you just want to avoid
re-compiling the core libraries, you don't have to delete the source
files. What you can do is to do the compile in two steps:

vlog -f my_core_files
vlog -f my_design_files

If you make any changes to your design files, you only need to run the
second step.

HTH,
Jim
http://home.comcast.net/~jimwu88/tools/


> > > Weng

 

[Weng Tianxiang]

Jim Wu wrote:

I found the simplest way to create a library for a project while using
ModelSim:
1. Put all necessary *.vhd files into one proejct directory;
2. Compile them without errors;
3. Delete all *.vhd files that are generated by Xilinx CoreGenerator or
something similar;

These deleted *.vhd code are still referenced properly in the work
library and there are no need to generate a separate library.

Any comments?


Not sure what you're trying to do. If you just want to avoid
re-compiling the core libraries, you don't have to delete the source
files. What you can do is to do the compile in two steps:

vlog -f my_core_files
vlog -f my_design_files

If you make any changes to your design files, you only need to run the
second step.

HTH,
Jim
http://home.comcast.net/~jimwu88/tools/


Weng

Hi Jim,
Thank you.

Weng