How to convert a algorithm to verilog code.

[naran]

Hi Experts,
How to convert a algorithm to verilog code.
I need some guidance and material regarding this could any one help me.


Thank You
Lakshminarayanan

 

[Mike Treseler]

naran wrote:

How to convert a algorithm to verilog code.
I need some guidance and material regarding this could any one help me.

I like MyHDL.
Here's a good example:

http://myhdl.jandecaluwe.com/doku.php/cookbook:sinecomp

-- Mike Treseler

 

[glen herrmannsfeldt]

naran wrote:

How to convert a algorithm to verilog code.
I need some guidance and material regarding this could any one help me.

Now, that is a good question with no easy answer.

Personally, my favorite architecture for verilog implementations
is the systolic array, but that depends somewhat on the algorithm.

Many algorithms are designed and optimized for a serial processor,
where one thing happens at a time. One reason for a verilog design
is the ability to do things, many things, in parallel. Doing that
tends to make the algorithm look very different.

If you want more answer you will have to say a little more about
what kind of algorithm you have. I do recommend looking into
the systolic array literature, though.

-- glen

 

[naran]

glen herrmannsfeldt wrote:

Now, that is a good question with no easy answer.

Personally, my favorite architecture for verilog implementations
is the systolic array, but that depends somewhat on the algorithm.

Many algorithms are designed and optimized for a serial processor,
where one thing happens at a time. One reason for a verilog design
is the ability to do things, many things, in parallel. Doing that
tends to make the algorithm look very different.

If you want more answer you will have to say a little more about
what kind of algorithm you have. I do recommend looking into
the systolic array literature, though.

-- glen

Thank You for u r reply.
I am not able to specify the particular type my algorithm belongs well
i will mention the process it does in simple words.
The input is a serial data and the algorithm process it and generates
the output depending upon the I/P.
What are the types of the hardware architecture used in Processor
design in vlsi.
I will go through them and make my algo based on the best one upon it.