How to change Read Only Constraint to Read-Write

I

Isaac

Guest
Hi,

I am using singal of 32 bit's lenght in my .vhd file and I am
compiling using Makefile. I have also defined a UCF file. My UCF file
is generating error when run ngd build using Makefile. The error is
given below :

ERROR:
Reading component libraries for design expansion...

Annotating constraints to design from file "VIR3.ucf" ...
ERROR:NgdBuild:755 - Line 49 in 'VIR3.ucf': Could not find net(s)
'Input<7>' in the design. To suppress this error use the -aul
switch,
specify the correct net name or remove the constraint.
ERROR:NgdBuild:755 - Line 50 in 'VIR3.ucf': Could not find net(s)
'Input<8>' in the design. To suppress this error use the -aul
switch,
specify the correct net name or remove the constraint.
ERROR:NgdBuild:755 - Line 51 in 'VIR3.ucf': Could not find net(s)
'Input<9>' in the design. To suppress this error use the -aul
switch,
specify the correct net name or remove the constraint.
ERROR:NgdBuild:755 - Line 52 in 'VIR3.ucf': Could not find net(s)
'Input<10>' in the design. To suppress this error use the -aul
switch,
specify the correct net name or remove the constraint.
ERROR:NgdBuild:755 - Line 53 in 'VIR3.ucf': Could not find net(s)
'Input<11>' in the design. To suppress this error use the -aul
switch,
specify the correct net name or remove the constraint.
ERROR:NgdBuild:755 - Line 54 in 'VIR3.ucf': Could not find net(s)
'Input<12>' in the design. To suppress this error use the -aul
switch,
specify the correct net name or remove the constraint.
ERROR:NgdBuild:755 - Line 55 in 'VIR3.ucf': Could not find net(s)
'Input<13>' in the design. To suppress this error use the -aul
switch,
specify the correct net name or remove the constraint.
ERROR:NgdBuild:755 - Line 56 in 'VIR3.ucf': Could not find net(s)
'Input<14>' in the design. To suppress this error use the -aul
switch,
specify the correct net name or remove the constraint.
ERROR:NgdBuild:755 - Line 57 in 'VIR3.ucf': Could not find net(s)
'Input<15>' in the design. To suppress this error use the -aul
switch,
specify the correct net name or remove the constraint.
ERROR:NgdBuild:755 - Line 58 in 'VIR3.ucf': Could not find net(s)
'Input<16>' in the design. To suppress this error use the -aul
switch,
specify the correct net name or remove the constraint.
ERROR:NgdBuild:755 - Line 59 in 'VIR3.ucf': Could not find net(s)
'Input<17>' in the design. To suppress this error use the -aul
switch,
specify the correct net name or remove the constraint.
ERROR:NgdBuild:755 - Line 60 in 'VIR3.ucf': Could not find net(s)
'Input<18>' in the design. To suppress this error use the -aul
switch,
specify the correct net name or remove the constraint.
ERROR:NgdBuild:755 - Line 61 in 'VIR3.ucf': Could not find net(s)
'Input<19>' in the design. To suppress this error use the -aul
switch,
specify the correct net name or remove the constraint.
ERROR:NgdBuild:755 - Line 62 in 'VIR3.ucf': Could not find net(s)
'Input<20>' in the design. To suppress this error use the -aul
switch,
specify the correct net name or remove the constraint.
ERROR:NgdBuild:755 - Line 63 in 'VIR3.ucf': Could not find net(s)
'Input<21>' in the design. To suppress this error use the -aul
switch,
specify the correct net name or remove the constraint.
ERROR:NgdBuild:755 - Line 64 in 'VIR3.ucf': Could not find net(s)
'Input<22>' in the design. To suppress this error use the -aul
switch,
specify the correct net name or remove the constraint.
ERROR:NgdBuild:755 - Line 65 in 'VIR3.ucf': Could not find net(s)
'Input<23>' in the design. To suppress this error use the -aul
switch,
specify the correct net name or remove the constraint.
ERROR:NgdBuild:755 - Line 66 in 'VIR3.ucf': Could not find net(s)
'Input<24>' in the design. To suppress this error use the -aul
switch,
specify the correct net name or remove the constraint.
ERROR:NgdBuild:755 - Line 67 in 'VIR3.ucf': Could not find net(s)
'Input<25>' in the design. To suppress this error use the -aul
switch,
specify the correct net name or remove the constraint.
ERROR:NgdBuild:755 - Line 68 in 'VIR3.ucf': Could not find net(s)
'Input<26>' in the design. To suppress this error use the -aul
switch,
specify the correct net name or remove the constraint.
ERROR:NgdBuild:755 - Line 69 in 'VIR3.ucf': Could not find net(s)
'Input<27>' in the design. To suppress this error use the -aul
switch,
specify the correct net name or remove the constraint.
ERROR:NgdBuild:755 - Line 70 in 'VIR3.ucf': Could not find net(s)
'Input<28>' in the design. To suppress this error use the -aul
switch,
specify the correct net name or remove the constraint.
ERROR:NgdBuild:755 - Line 71 in 'VIR3.ucf': Could not find net(s)
'Input<29>' in the design. To suppress this error use the -aul
switch,
specify the correct net name or remove the constraint.
ERROR:NgdBuild:755 - Line 72 in 'VIR3.ucf': Could not find net(s)
'Input<30>' in the design. To suppress this error use the -aul
switch,
specify the correct net name or remove the constraint.
ERROR:NgdBuild:755 - Line 73 in 'VIR3.ucf': Could not find net(s)
'Input<31>' in the design. To suppress this error use the -aul
switch,
specify the correct net name or remove the constraint.
ERROR:parsers:11 - Encountered unrecognized constraint while parsing.
ERROR:NgdBuild:19 - Errors found while parsing constraint file
"VIR3.ucf".


--------------------------------------------------------------------------------

I used -aul switch in my ngdbuild statement but this action simply
delete this message. And in the actual *.par file I could not see
signal's greater than 6th bits ( i.e there is no pin assignent of
Input greater than Input<6>.


Then, I comment all the signal Input<7> to Input <31> in my UCF file
and did NDG bulild. After doing this I could see pin assignment for
Input <0> to Input <6> as before.

After doing this I used ngd file and UCF file ( but this time all
signal's Input <0> to Input <31> were uncommented) . I used these both
file to see whats happening in Contraint Editor comes with Xilinx ISE
5.1
Keep one thing in mind that ngd file is produce using constraint
higher than 6 being commented and UCF file is used having all the
signal 0 to 31 uncommented .
I found that
1. In UCF Contraint (Read-Write) tab
NET "Input<0>" LOC = "P94" ;
NET "Input<1>" LOC = "P96" ;
NET "Input<2>" LOC = "P99" ;
NET "Input<3>" LOC = "P101" ;
NET "Input<4>" LOC = "P103" ;
NET "Input<5>" LOC = "P107" ;
NET "Input<6>" LOC = "P109" ;

2. In UCF Constraint ( Read Only) tab

NET "Input<7>" LOC = "P111" ;
NET "Input<8>" LOC = "P125" ;
NET "Input<9>" LOC = "P126" ;
NET "Input<10>" LOC = "P127" ;
NET "Input<11>" LOC = "P128" ;
NET "Input<12>" LOC = "P130" ;
NET "Input<13>" LOC = "P131" ;
NET "Input<14>" LOC = "P132" ;
NET "Input<15>" LOC = "P133" ;
NET "Input<16>" LOC = "P139" ;
NET "Input<17>" LOC = "P140" ;
NET "Input<18>" LOC = "P141" ;
NET "Input<19>" LOC = "P142" ;
NET "Input<20>" LOC = "P144" ;
NET "Input<21>" LOC = "P146" ;
NET "Input<22>" LOC = "P147" ;
NET "Input<23>" LOC = "P149" ;
NET "Input<24>" LOC = "P152" ;
NET "Input<25>" LOC = "P153" ;
NET "Input<26>" LOC = "P154" ;
NET "Input<27>" LOC = "P155" ;
NET "Input<28>" LOC = "P157" ;
NET "Input<29>" LOC = "P159" ;
NET "Input<30>" LOC = "P160" ;
NET "Input<31>" LOC = "P161" ;

Now, could any body tell what to do now in order to assigned pin's to
all the rest of the bit's


Any help would be appreciated

Rgds
Isaac
 
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