how to adjust parameters of low hierarchy

B

bowling

Guest
Hi guys,

I am a new user of Cadence. Please don't ignore my question if you
think it's too stupid. :wink:

I created a schematic then a symbol of logic inverter with NMOS and
PMOS. Then used it to create a schematic, say D flip-flop, with the
inverter symbol. I'd like to change the number of fingers of
PMOS/NMOS in the inverter I used in D flip-flop in order to increase
the maximum speed which D flip-flop can operate at. I know I can
achieve that by "hierarchy edit", but I don't wanna change the
parameters of the inverter permanently. Because I also use it in some
other schematics. How can I do that? cdf? skill? hierachy editor? or
shall I make a copy of the inverter that dedicates to the particular
schematic only? Is it possible to add low hierarchy parameters (i.e.
number of fingers of PMOS/NMOS) to the properties of the high
hierarchy schematic (i.e. D flip-flop in this case), so that I can
adjust parameters conveniently in the D filop-flop schematic?

I highly appreciate your help!
 
e.g. use in the number of fingers filed
of the edit properties of your inverter pPar("nof")
this will pass the parameter 'nof' one hierarchy level up.

See
'Virtuoso Analog Design Environment User Guide'
'Design Variables and Simulation Files {[or Direct Simulation]'
'Passed Parameter Value of One Level Higher: pPar()'

Maybe this helps you.

Bernd

bowling wrote:
Hi guys,

I am a new user of Cadence. Please don't ignore my question if you
think it's too stupid. :wink:

I created a schematic then a symbol of logic inverter with NMOS and
PMOS. Then used it to create a schematic, say D flip-flop, with the
inverter symbol. I'd like to change the number of fingers of
PMOS/NMOS in the inverter I used in D flip-flop in order to increase
the maximum speed which D flip-flop can operate at. I know I can
achieve that by "hierarchy edit", but I don't wanna change the
parameters of the inverter permanently. Because I also use it in some
other schematics. How can I do that? cdf? skill? hierachy editor? or
shall I make a copy of the inverter that dedicates to the particular
schematic only? Is it possible to add low hierarchy parameters (i.e.
number of fingers of PMOS/NMOS) to the properties of the high
hierarchy schematic (i.e. D flip-flop in this case), so that I can
adjust parameters conveniently in the D filop-flop schematic?

I highly appreciate your help!
Click to expand...
 
In article <IPidnco31vJ5zcreRVn_vA@giganews.com>,
bowlingwangke@yahoo.co-dot-uk.no-spam.invalid says...
Hi guys,

I am a new user of Cadence. Please don't ignore my question if you
think it's too stupid. :wink:

I created a schematic then a symbol of logic inverter with NMOS and
PMOS. Then used it to create a schematic, say D flip-flop, with the
inverter symbol. I'd like to change the number of fingers of
PMOS/NMOS in the inverter I used in D flip-flop in order to increase
the maximum speed which D flip-flop can operate at. I know I can
achieve that by "hierarchy edit", but I don't wanna change the
parameters of the inverter permanently. Because I also use it in some
other schematics. How can I do that? cdf? skill? hierachy editor? or
shall I make a copy of the inverter that dedicates to the particular
schematic only? Is it possible to add low hierarchy parameters (i.e.
number of fingers of PMOS/NMOS) to the properties of the high
hierarchy schematic (i.e. D flip-flop in this case), so that I can
adjust parameters conveniently in the D filop-flop schematic?
Click to expand...
investigate into using pPar() in your D-flip flop. Then you can change
properties of underlying modules on a "per instance" base.

On the transistor parameter you want to have parametrized place a pPar()
like: W=pPar("w"), then recreate your symbol to get the CDB right (or
edit CDF manually (if you already have a symbol copy it away and then
insert it again later))

Place these custom cells in your D-Flip flop and place a new pPar on
each property you want to propagate to the next level. If you want cells
with individual parameters, then you have to create unique pPar()
parameters for each cell. Then recreate your DFF symbol to update CDF.

Now you can place These DFF's with different walues for the transistor
parameters you have propagated bottom up.

This involves quite a lot of work, especially if you want to mimic
different "drive strengths" of your basic cell library at level two, but
at least you can get your task done. Maybe there is a much simpler way
which I haven't discovered.
--
Svenn
 
where can i get the 'Virtuoso Analog Design Environment User Guide'?
 
Tons of thanks to Bernd and Svenn!! Hope there are alternative ways of
doing it coming up.
 
/<dfII_inst_dir>/doc/anasimhelp/anasimhelp.pdf

or just type 'cdsdoc' in your terminal.

'cdsdoc' is the online help system, and it is essential!

Bernd

bowling wrote:
where can i get the 'Virtuoso Analog Design Environment User Guide'?
Click to expand...
 
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