How to add an binary value to a vector?

[ALuPin]

Hi everybody,

I have a question concerning the following:

If I want to add a binary value to a vector WITHOUT using
the ieee.std_logic_unsigned.all library
I get the error message : "No feasible entries for infix op: "+"
How can I do this addition only with the ARITH and 1164 library?
Thank you for your help.

Kind regards
Andre V.


----------------------------------------------------------------
use ieee.std_logic_arith.all;
use ieee.std_logic_1164.all;

signal t_Parallel_data_in : std_logic_vector(7 downto 0);

begin

process
begin
...
if condition='1' then
t_Parallel_data_ in <= t_Parallel_data_in + "00001010";
end if;

end process;
-----------------------------------------------------------------

 

[Anders Hellerup Madsen]

ALuPin wrote:

Hi everybody,

I have a question concerning the following:

If I want to add a binary value to a vector WITHOUT using
the ieee.std_logic_unsigned.all library
I get the error message : "No feasible entries for infix op: "+"
How can I do this addition only with the ARITH and 1164 library?
Thank you for your help.

Convert you operands to unsigned, using the unsigned() function, then
add them, and convert them back std_logic_vector with the
conv_std_logic_vector() function.

-- Anders

 

[Tim Hubberstey]

ALuPin wrote:

If I want to add a binary value to a vector WITHOUT using
the ieee.std_logic_unsigned.all library
I get the error message : "No feasible entries for infix op: "+"
How can I do this addition only with the ARITH and 1164 library?

use ieee.std_logic_arith.all;
use ieee.std_logic_1164.all;

signal t_Parallel_data_in : std_logic_vector(7 downto 0);

begin

process
begin
...
if condition='1' then
t_Parallel_data_in <= t_Parallel_data_in + "00001010";

t_Parallel_data_in <= std_logic_vector(unsigned(t_Parallel_data_in) +
10));

or, if you REALLY want to use the "00001010" format:

t_Parallel_data_in <= std_logic_vector(unsigned(t_Parallel_data_in) +
unsigned'("00001010"));

end if;
end process;

I also suggest that you use ieee.numeric_std instead of
ieee.std_logic_arith as it's newer and more portable across tools. For
your case, the code is the same for both packages.
--
Tim Hubberstey, P.Eng. . . . . . Hardware/Software Consulting Engineer
Marmot Engineering . . . . . . . VHDL, ASICs, FPGAs, embedded systems
Vancouver, BC, Canada . . . . . . . . . . . http://www.marmot-eng.com