how does PC communicate with FPGA?

Hi,

I am unable to understand that how a PC communicate with FPGA. I have used Xilinx software to implement codes and then connected a USB cable to Xilinx test kit that did all jobs for me. Of course I assigned the chip pins with the signal names through Xilinx software itself. I am unaware what happens after I connect the USB cable to the kit. Please tell me what devices are in between the PC and the chip in the kit and how does the PC communicate with the chip or loads the design into the chip?

thanks Koyel

 

[Gabor]

On 11/10/2013 3:04 AM, koyel.aphy@gmail.com wrote:

Hi,

I am unable to understand that how a PC communicate with FPGA. I have used Xilinx software to implement codes and then connected a USB cable to Xilinx test kit that did all jobs for me. Of course I assigned the chip pins with the signal names through Xilinx software itself. I am unaware what happens after I connect the USB cable to the kit. Please tell me what devices are in between the PC and the chip in the kit and how does the PC communicate with the chip or loads the design into the chip?

thanks Koyel

Most Xilinx kits use some sort of FTDI USB chip. You should
be able to find the schematic for your kit on the Xilinx site.

--
Gabor

 

[Tim Wescott]

On Sun, 10 Nov 2013 00:04:09 -0800, koyel.aphy wrote:

Hi,

I am unable to understand that how a PC communicate with FPGA. I have
used Xilinx software to implement codes and then connected a USB cable
to Xilinx test kit that did all jobs for me. Of course I assigned the
chip pins with the signal names through Xilinx software itself. I am
unaware what happens after I connect the USB cable to the kit. Please
tell me what devices are in between the PC and the chip in the kit and
how does the PC communicate with the chip or loads the design into the
chip?

thanks Koyel

The design is loaded into the FPGA through a synchronous serial
connection. There should be some Xilinx data sheet that describes the
process. If they haven't changed things since I last really paid
attention that synchronous serial connection can be used by a processor
(on-board or external) to push a bitstream into the FPGA, or it can be
used at boot up for the FPGA to suck a bitstream out of a serial flash
chip.

In a production system with a separate microprocessor, you can keep the
FPGA design in the processor flash memory, and load the FPGA from the
microprocessor -- Xilinx has app notes that detail that process, too. I
remember doing that during a period when the biggest Xilinx FPGAs were
quite a bit bigger than the biggest Xilinx serial flash chips, and 'big'
microcontrollers all tended to come equipped for external flash.

--

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com