How do I synthesize?

S

Stan Marsh

Guest
Hey all,

How to do I synthesize verilog code into a logic circuit? Currently
I'm doing verilog programming on Linux using the Icarus Verilog
compiler. I however I have no idea how to generate a logic circuit
from my behavioral models.

Thanks for you help.
 
"Stan Marsh" <linuxfreak87@gmail.com> wrote in message
news:1184345477.758056.180800@57g2000hsv.googlegroups.com...
Hey all,

How to do I synthesize verilog code into a logic circuit? Currently
I'm doing verilog programming on Linux using the Icarus Verilog
compiler. I however I have no idea how to generate a logic circuit
from my behavioral models.

Thanks for you help.
Click to expand...
Verilog code is usually used for ASICs, FPGAs, or CPLDs. Verilog is not
helpful for wiring up 7400 logic gates. Do you have an FPGA or CPLD you
wish to use? If so, what manufacturer?
 
Stan Marsh :
Hey all,

How to do I synthesize verilog code into a logic circuit? Currently
I'm doing verilog programming on Linux using the Icarus Verilog
compiler. I however I have no idea how to generate a logic circuit
from my behavioral models.

Thanks for you help.
Click to expand...
You may want to look on a project on my site. It is a USB full speed,
which is simulated using icarus. The synthesis is done using XILINX
XST tool. I installed on linus (SuSE 9.2). Please see links below.

http://bknpk.no-ip.biz/
http://bknpk.no-ip.biz/usb_1.html
http://bknpk.no-ip.biz/usb_8051_verilog_syn/usb_1_syn_intro.html
 
On Jul 13, 1:07 pm, "John_H" <newsgr...@johnhandwork.com> wrote:
"Stan Marsh" <linuxfrea...@gmail.com> wrote in message

news:1184345477.758056.180800@57g2000hsv.googlegroups.com...

Hey all,

How to do I synthesize verilog code into a logic circuit? Currently
I'm doing verilog programming on Linux using the Icarus Verilog
compiler. I however I have no idea how to generate a logic circuit
from my behavioral models.

Thanks for you help.

Verilog code is usually used for ASICs, FPGAs, or CPLDs. Verilog is not
helpful for wiring up 7400 logic gates. Do you have an FPGA or CPLD you
wish to use? If so, what manufacturer?
Click to expand...
So when I synthesize, I won't be able to see what sort of logic (via
netlists) is synthesized for my behavioral models? I've never used an
FPGA before, so I did a quick search and looks like Xilinx is the
most popular(?)
 
"Stan Marsh" <linuxfreak87@gmail.com> wrote in message
news:1184348318.081619.309240@m3g2000hsh.googlegroups.com...
On Jul 13, 1:07 pm, "John_H" <newsgr...@johnhandwork.com> wrote:
"Stan Marsh" <linuxfrea...@gmail.com> wrote in message

news:1184345477.758056.180800@57g2000hsv.googlegroups.com...

Hey all,

How to do I synthesize verilog code into a logic circuit? Currently
I'm doing verilog programming on Linux using the Icarus Verilog
compiler. I however I have no idea how to generate a logic circuit
from my behavioral models.

Thanks for you help.

Verilog code is usually used for ASICs, FPGAs, or CPLDs. Verilog is not
helpful for wiring up 7400 logic gates. Do you have an FPGA or CPLD you
wish to use? If so, what manufacturer?

So when I synthesize, I won't be able to see what sort of logic (via
netlists) is synthesized for my behavioral models? I've never used an
FPGA before, so I did a quick search and looks like Xilinx is the
most popular(?)
Click to expand...
Xilinx is ahead of Altera in FPGA sales. Both companies have development
boards with good functionality for about $200 or less.

I don't use XST because our company uses the leading 3rd party FPGA
synthesis software which I regularly use to see the technology-level detail
of the silicon I'm synthesizing. I believe XST has a post-synthesis view of
the technology in a schematic-like form but I'm not certain. The project
Pinhas pointed out may show you some of the capabilities of the back-end
tools beyond simply programming the part; you'll have to look to find out.

CPLD development boards are slighlty less expensive than FPGAs and may be a
better vehicle for understanding the synthesis details since CPLDs tend to
be a bit less complex and varied than modern FPGAs. But if you want a
platform to explore qith over many months, expanding your knowledge well
beyond simple synthesis, FPGAs are the way to go.

If you use the free FPGA tools, you can perform synthesis, analyze the
synthesis results for area utilization and performance estimates, run the
synthesis results through the back-end process, analyze the *actual* results
in a form that can generate a program file for your device. If you're just
starting with synthesis, you don't need to bog yourself down with the
implementation details until later.
 
Stan Marsh wrote:
Hey all,

How to do I synthesize verilog code into a logic circuit? Currently
I'm doing verilog programming on Linux using the Icarus Verilog
compiler. I however I have no idea how to generate a logic circuit
from my behavioral models.

Thanks for you help.
Click to expand...
Did you think about using a proper synthesis tool like Synopsys DC
or you really want to do it using icarus ?

--
Dr. Iakovos Stamoulis
Director of Technology

Think Silicon
http://www.think-silicon.com

Patras Science Park
Rion Achaias 26504
Greece
Tel: +30 2610 911543
 
Stan Marsh wrote:
How to do I synthesize verilog code into a logic circuit? Currently
I'm doing verilog programming on Linux using the Icarus Verilog
compiler.

On Jul 13, 12:11 pm, Pinhas <bk...@hotmail.com> wrote:
If you use the free FPGA tools, you can perform synthesis, analyze the
synthesis results for area utilization and performance estimates, run the
synthesis results through the back-end process, analyze the *actual* results
in a form that can generate a program file for your device.
Click to expand...
On Jul 19, 11:27 am, Iakovos Stamoulis <i.stamou...@think-silicon.com>
wrote:
Did you think about using a proper synthesis tool like Synopsys DC
or you really want to do it using icarus ?
Click to expand...
On comp.arch.fpga, Adam Megacz mentioned his researcfh project using
icarus and FPSLIC fpgas from Atmel. http://research.cs.berkeley.edu/project/slipway/

I'm thinking of making some boards. Anyone interested in boards to
experiment with his open code/open hardware method?

John Griessen
 
On Jul 19, 12:27 pm, Iakovos Stamoulis <i.stamou...@think-silicon.com>
wrote:
Stan Marsh wrote:
Hey all,

How to do I synthesize verilog code into a logic circuit? Currently
I'm doing verilog programming on Linux using the Icarus Verilog
compiler. I however I have no idea how to generate a logic circuit
from my behavioral models.

Thanks for you help.

Did you think about using a proper synthesis tool like Synopsys DC
or you really want to do it using icarus ?

--
Dr. Iakovos Stamoulis
Director of Technology

Think Siliconhttp://www.think-silicon.com

Patras Science Park
Rion Achaias 26504
Greece
Tel: +30 2610 911543
Click to expand...
Well for now, I'd go with the Icarus becuase its a free alternative.
 
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