How do I handle this ASIC memory related issue?

[Novice]

I received a design from a vendor, which is designed for Virtex 2 FPGA.
In the design there are four instances of RAMs, which are of DPRAMs of
16bX4096w each. (In fact, there are no WRITE events to these RAMs
throughout simulations.)

In the test bench, a FOR loop reads in some ASCII files and pumps into
RAMs at beginning of each simulation.

Now when I convert this portion into ASIC using library RAMs, how should
I take care of this?

Thank you for your comments.

 

[gabor]

I think you're missing the obvious. Although implemented as "RAM"
in the FPGA, what you have is a ROM. FPGA's typically implement
ROM as RAM that is loaded at configuration time. For the ASIC the
obvious thing would be to create a ROM (assuming the data in the
RAM is always loaded from the same ASCII files and doesn't
need to change for some applications).

Check that the ASCII files are indeed the only necessary data content
and if so look for ROM components in the ASIC library.

Regards,
Gabor

Novice wrote:

I received a design from a vendor, which is designed for Virtex 2 FPGA.
In the design there are four instances of RAMs, which are of DPRAMs of
16bX4096w each. (In fact, there are no WRITE events to these RAMs
throughout simulations.)

In the test bench, a FOR loop reads in some ASCII files and pumps into
RAMs at beginning of each simulation.

Now when I convert this portion into ASIC using library RAMs, how should
I take care of this?

Thank you for your comments.

 

[Novice]

"gabor" <gabor@alacron.com> wrote in message
news:1142348076.033447.252740@p10g2000cwp.googlegroups.com...

I think you're missing the obvious. Although implemented as "RAM"
in the FPGA, what you have is a ROM. FPGA's typically implement
ROM as RAM that is loaded at configuration time. For the ASIC the
obvious thing would be to create a ROM (assuming the data in the
RAM is always loaded from the same ASCII files and doesn't
need to change for some applications).

Check that the ASCII files are indeed the only necessary data content
and if so look for ROM components in the ASIC library.

Regards,
Gabor

Thank you Gabor. I was aware that it is a ROM in essence. However, I didn't
find any ROM components in the ASIC library. I guess it will be the ASIC
library
I shall study.