How do I declare CFILE variables with global visibility?

G

G Iveco

Guest
Hi there,

I am using this public domain package, maybe some of you know.
It basically mimics C's standard IO functions.. It works for my simulation
but I found the CFILE variable must be declared in/for a single process.

For large designs, I may need to print things on the edge of signals, which
means another process. Examples being detection of SYN word, Output
Error flag, etc.

http://bear.ces.cwru.edu/vhdl/
 
G Iveco wrote:

I am using this public domain package, maybe some of you know.
It basically mimics C's standard IO functions.. It works for my simulation
but I found the CFILE variable must be declared in/for a single process.

For large designs, I may need to print things on the edge of signals, which
means another process. Examples being detection of SYN word, Output
Error flag, etc.
Click to expand...
It's quite possible to provide test stimulus
and verification using a single process.
See my testbench example.

If you prefer to go further out
on the original tangent, start here:
http://groups.google.com/groups/search?q=vhdl+protected+type+example&scoring=d&


-- Mike Treseler
 
G Iveco wrote:

Hi there,

I am using this public domain package, maybe some of you know.
It basically mimics C's standard IO functions.. It works for my simulation
but I found the CFILE variable must be declared in/for a single process.

For large designs, I may need to print things on the edge of signals,
which means another process. Examples being detection of SYN word, Output
Error flag, etc.

http://bear.ces.cwru.edu/vhdl/
Click to expand...
I haven't looked at these packages so I don't know how this CFILE is used or
what type it is.

I have my own set of procedures for text output. What it boils down to is a
package declaring the output file:

FILE logfile : text OPEN write_mode IS "log";

Furthermore, this package contains print procedures that use logfile
internally (so not via their parameter lists).

Now anywhere where you want to print to this file, you just make that
package visible by a USE clause and use the print procedures.

Because logfile is declared in a package, it is only opened once, even if
multiple processes use the print procedures.

--
Paul Uiterlinden
www.aimvalley.nl
e-mail addres: remove the not.
 
"Mike Treseler" <mike_treseler@comcast.net> wrote in message
news:5hp2v3F3kt7i0U1@mid.individual.net...
G Iveco wrote:

I am using this public domain package, maybe some of you know.
It basically mimics C's standard IO functions.. It works for my
simulation
but I found the CFILE variable must be declared in/for a single process.

For large designs, I may need to print things on the edge of signals,
which
means another process. Examples being detection of SYN word, Output
Error flag, etc.

It's quite possible to provide test stimulus
and verification using a single process.
See my testbench example.

If you prefer to go further out
on the original tangent, start here:
http://groups.google.com/groups/search?q=vhdl+protected+type+example&scoring=d&


-- Mike Treseler
Click to expand...

Yes I am aware of that it's possible to code everything in one process.

Designs get complicated in communication area, where the arrival of some
signals and delays in demodulated data can not be determined, so writing a
single process will be extremely messy and unreadable.

I think i will keep exploring until I have built up all my coding habbits..
 
"Paul Uiterlinden" <puiterl@notaimvalley.nl> wrote in message
news:46b7953a$0$239$e4fe514c@news.xs4all.nl...
G Iveco wrote:

Hi there,

I am using this public domain package, maybe some of you know.
It basically mimics C's standard IO functions.. It works for my
simulation
but I found the CFILE variable must be declared in/for a single process.

For large designs, I may need to print things on the edge of signals,
which means another process. Examples being detection of SYN word, Output
Error flag, etc.

http://bear.ces.cwru.edu/vhdl/

I haven't looked at these packages so I don't know how this CFILE is used
or
what type it is.

I have my own set of procedures for text output. What it boils down to is
a
package declaring the output file:

FILE logfile : text OPEN write_mode IS "log";

Furthermore, this package contains print procedures that use logfile
internally (so not via their parameter lists).

Now anywhere where you want to print to this file, you just make that
package visible by a USE clause and use the print procedures.

Because logfile is declared in a package, it is only opened once, even if
multiple processes use the print procedures.

--
Paul Uiterlinden
www.aimvalley.nl
e-mail addres: remove the not.
Click to expand...

CFILE is an integer subtype.

SUBTYPE CFILE IS INTEGER;

With this package, one can write fprintf and printf as if it's in C
language..


Here are some examples,

variable fout: CFILE; --FILE fout: text; --FILE *fout;
variable fin: CFILE; --FILE fin: text; --FILE *fin;
variable fout1:CFILE; --FILE fout1:text;
variable fout2:CFILE; --FILE fout2:text;


fout1:=fopen("xxx_fout1.txt", "w"); --file_open(fout1, "xxx_fout1.txt",
WRITE_MODE);
fprintf(fout1, " Hello, World\n 123\n 9bc ");
fclose(fout1); --fclose(fbuf1, fout1);
 
G Iveco wrote:

CFILE is an integer subtype.

SUBTYPE CFILE IS INTEGER;

With this package, one can write fprintf and printf as if it's in C
language..


Here are some examples,

variable fout: CFILE; --FILE fout: text; --FILE *fout;
variable fin: CFILE; --FILE fin: text; --FILE *fin;
variable fout1:CFILE; --FILE fout1:text;
variable fout2:CFILE; --FILE fout2:text;


fout1:=fopen("xxx_fout1.txt", "w"); --file_open(fout1,
"xxx_fout1.txt", WRITE_MODE);
fprintf(fout1, " Hello, World\n 123\n 9bc ");
fclose(fout1); --fclose(fbuf1, fout1);
Click to expand...
Based on those examples, I suppose these variables can be made shared
variables (or rather: protected shared variables) declared in a package.
Then you can print from different processes to the same file. But still you
should be carefull not to open the file more than once.

Apart from everything, I don't like the idea of trying to mimic the C-style
print procedures in VHDL. This is my personal taste, based on the fact that
VHDL lacks variable argument lists. So there always be limitations. I'd
rather stick to VHDL and use type LINE from std.textio to build the strings
I want to print. Together with some home brew print procedures and
conversion functions things are quite manageable.

--
Paul Uiterlinden
www.aimvalley.nl
e-mail addres: remove the not.
 
G Iveco wrote:

Designs get complicated in communication area, where the arrival of some
signals and delays in demodulated data can not be determined, so writing a
single process will be extremely messy and unreadable.
Click to expand...
Might be.
So might any other style.
Hardware description is based on communicating sequential processes.
Each process is a box that is wired to other boxes.
If I use lots of boxes, the procedures are obscured by wires.
If I use just one box, the wires are are obscured by procedures.

-- Mike Treseler
 
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