How do I create a flat spectre netlist from the ADE?

[PK]

Hi,

I am trying to get a flat netlist for (analog) transistor level
circuits drawn in the schematic editor. From the editor I typically
call the "Analog Design Environment" and run spectre simulations. For
some special simulations I modify the spectre netlists, and I am
looking for _flat_ netlists i.e. not subckt...

I tried by using a .simrc file in my homedir that does a simNetlistHier
= nil ; this is reflected in the ~/simulation -> cell_name -> .....
spectre -> ... netlist -> si.env file. However, the netlists that are
generated are hierarchical...

Any suggestions?

Thanks,

PK

 

[PK]

For an in house tool we are developing we want to have a unique
instance for each device.

I am kind of surprised that it seems this cannot be done. I thought
that for LVS purposes, flat netlists are required anyway. But, I am not
a CAD specialist so I am probably wrong on this.

-- Peter