How Do I Convert an Integer to a String?

C

Chris

Guest
Hi All

Does verilog have a function that will allow me to convert an integer to a
string?

Thanks,
Chris
 
Chris wrote:
Hi All

Does verilog have a function that will allow me to convert an integer to a
string?

Thanks,
Chris



Verilog is so awesomely uncasted that there is really no difference
between an integer and a string. For example,

parameter strng = {"ABC",8'd68,8'd69}; // 8'd68 is the ASCII for "D"
initial $display("%s",strng);

This should print the string "ABCDE".
-Kevin
 
On Fri, 28 Mar 2008 09:19:36 -0600, Kevin Neilson wrote:

Does verilog have a function that will allow me to convert an integer to a
string?

Verilog is so awesomely uncasted that there is really no difference
between an integer and a string. For example,

parameter strng = {"ABC",8'd68,8'd69}; // 8'd68 is the ASCII for "D"
initial $display("%s",strng);
You know, I really don't think that's quite what the OP was after
(even though it's perfectly true, in all its awesomeness).
I *love* the phrase "awesomely uncasted"!

The Right Answer (tm) is...

parameter WidthOfString = 4; // number of characters
reg my_string[ 1 : 8*WidthOfString ];
integer x;
...
$sformat(my_string, "%d", x);

That will put a string representation of the integer into the
"string", right-justified and padded with leading spaces.
Alternatively:

$sformat(my_string, "%0d", x);

will pad with leading zero bytes (nulls), which *should* be
ignored by string manipulation functions such as $display.

In SystemVerilog we have string as a proper data type, so
you can do this instead:

string sv_string;
integer x;
...
$sformat(sv_string, "%0d", x);

and now "sv_string" will automatically stretch to be
just large enough to hold the string representation of x.

Whenever I think about "strings" in traditional Verilog,
the thought carries a mental accompaniment of those
wonderful Muppets scenes of a huge audience all jumping
up and down and laughing... strings in Verilog-2001 are
not something you should take too seriously.
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services

Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan.bromley@MYCOMPANY.com
http://www.MYCOMPANY.com

The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.
 
On Fri, 28 Mar 2008 15:44:19 +0000, Jonathan Bromley wrote:

The Right Answer (tm) is...
Oh, for heaven's sake, why do I ever open my mouth?

Let's pretend I actually wrote the sensible version:

my_string;
because it would just be too embarrassing for
someone in my position to have made such a
stupid beginner's mistake, wouldn't it? :)
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services

Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan.bromley@MYCOMPANY.com
http://www.MYCOMPANY.com

The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.
 
Thanks Jonathan - that's what I was looking for.

"Jonathan Bromley" <jonathan.bromley@MYCOMPANY.com> wrote in message
news:kt3qu3pva52bq6kubeiajck7ef2sdvgp5j@4ax.com...
On Fri, 28 Mar 2008 09:19:36 -0600, Kevin Neilson wrote:

Does verilog have a function that will allow me to convert an integer to
a
string?

Verilog is so awesomely uncasted that there is really no difference
between an integer and a string. For example,

parameter strng = {"ABC",8'd68,8'd69}; // 8'd68 is the ASCII for "D"
initial $display("%s",strng);

You know, I really don't think that's quite what the OP was after
(even though it's perfectly true, in all its awesomeness).
I *love* the phrase "awesomely uncasted"!

The Right Answer (tm) is...

parameter WidthOfString = 4; // number of characters
reg my_string[ 1 : 8*WidthOfString ];
integer x;
...
$sformat(my_string, "%d", x);

That will put a string representation of the integer into the
"string", right-justified and padded with leading spaces.
Alternatively:

$sformat(my_string, "%0d", x);

will pad with leading zero bytes (nulls), which *should* be
ignored by string manipulation functions such as $display.

In SystemVerilog we have string as a proper data type, so
you can do this instead:

string sv_string;
integer x;
...
$sformat(sv_string, "%0d", x);

and now "sv_string" will automatically stretch to be
just large enough to hold the string representation of x.

Whenever I think about "strings" in traditional Verilog,
the thought carries a mental accompaniment of those
wonderful Muppets scenes of a huge audience all jumping
up and down and laughing... strings in Verilog-2001 are
not something you should take too seriously.
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services

Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan.bromley@MYCOMPANY.com
http://www.MYCOMPANY.com

The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.
 
:)

"Jonathan Bromley" <jonathan.bromley@MYCOMPANY.com> wrote in message
news:jp4qu314ulij0a2hngbm1kqcbl6nocnbg1@4ax.com...
On Fri, 28 Mar 2008 15:44:19 +0000, Jonathan Bromley wrote:

The Right Answer (tm) is...

Oh, for heaven's sake, why do I ever open my mouth?

reg my_string[ 1 : 8*WidthOfString ];

Let's pretend I actually wrote the sensible version:

reg [ 1 : 8*WidthOfString ] my_string;

because it would just be too embarrassing for
someone in my position to have made such a
stupid beginner's mistake, wouldn't it? :)
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services

Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan.bromley@MYCOMPANY.com
http://www.MYCOMPANY.com

The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.
 

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