A
Aiken
Guest
I know the simple answer will be use NisoII...
But in my situation is ..I cannot use NisoII or any other soft/hard
core processor (actually is..I am not able to use any asm/c ..whatever
computer programing language).
I would want to know anyone try to build a FSM to "talk" with the
Avalon bus before?
What should I do/understand first for build a FSM to work as Master in
Avalon bus?
My project require to receive packet and put them into memory and then
I have another logic to read from the memory.
The data flow is that
Ethernet --> PHY(chip) --> TSE MAC IP --> Avalon bus --> memory --
1. PCI Express Development Kit, Stratix II GX Edition (http://
www.altera.com/products/devkits/altera/kit-pciexpress_s2gx.html)
2. DDR2 controller demo (non Avalon Bus), (it is work on the PCI
Express Development Kit)
3. TSE MAC IP (I did not try it..because all the demo are using
NiosII)
But in my situation is ..I cannot use NisoII or any other soft/hard
core processor (actually is..I am not able to use any asm/c ..whatever
computer programing language).
I would want to know anyone try to build a FSM to "talk" with the
Avalon bus before?
What should I do/understand first for build a FSM to work as Master in
Avalon bus?
My project require to receive packet and put them into memory and then
I have another logic to read from the memory.
The data flow is that
Ethernet --> PHY(chip) --> TSE MAC IP --> Avalon bus --> memory --
What I have now:DDR2 controller ->DDR2 memory.
1. PCI Express Development Kit, Stratix II GX Edition (http://
www.altera.com/products/devkits/altera/kit-pciexpress_s2gx.html)
2. DDR2 controller demo (non Avalon Bus), (it is work on the PCI
Express Development Kit)
3. TSE MAC IP (I did not try it..because all the demo are using
NiosII)