How can I design a RF analog CMOS subtractor

[sharifeee01@gmail.com]

Hi all,
I have to design a cmos analog RF subtractor. Conditions it should
be meet subtractor
1. ultra low power
2. No DC component in output
3. Large signals at input terminals
4. Gain must be unity.

I am waiting for assistance.

 

[Jim Thompson]

On 2 Dec 2006 21:37:53 -0800, "sharifeee01@gmail.com"
<sharifeee01@gmail.com> wrote:

Hi all,
I have to design a cmos analog RF subtractor. Conditions it should
be meet subtractor
1. ultra low power
2. No DC component in output
3. Large signals at input terminals
4. Gain must be unity.

I am waiting for assistance.

We're waiting, too. When's your homework due ?

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice480)460-2350 | |
| E-mail Address at Website Fax480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.

 

[Charles Schuler]

<sharifeee01@gmail.com> wrote in message
news:1165124273.341611.136320@j44g2000cwa.googlegroups.com...

Hi all,
I have to design a cmos analog RF subtractor. Conditions it should
be meet subtractor
1. ultra low power
2. No DC component in output
3. Large signals at input terminals
4. Gain must be unity.

I am waiting for assistance.

For your homework? Oh well,
http://www.wiss.ece.okstate.edu/resource/Cadence/SpectreRF_Mixer.pdf