High radix multiplier

G

Giox

Guest
Hello everybody,
I would like to implement a multiplier with word size equal to 16.
However I read some book, for example "Computer Arithmetic" by Parhami,
and I found only high radix multiplier radix-8 and radix-16 at maximum.
Is there that can suggest me some good reference (book, articles etc)
about this topic?
Thanks a lot
Giovanni
 
if designing for FPGAs look at "Advanced Digital Design with the
Verilog HDL by Michael D Ciletti
 

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