help

hi i am new to vhdl i have doubt with following code lines:

after architecture begin if i write for loop as shown below which
changes one of the parameter of sensitivity list of process as shown
below will the process run after every iteration of loop.

architecture structure
begins

a<="00000000";
for i in 1 to 256 loop
a<=a+"1";
end loop;

process(a,clk) --since a changes in
every iteration will process run
begin --after every
iteration


--body of process

end process;

end architecture;

 

[Peter]

On 14 Mar, 13:39, vipinkumar9...@gmail.com wrote:

hi i am new to vhdl i have doubt with following code lines:

after architecture begin if i write for loop as shown below which
changes one of the parameter of sensitivity list of process as shown
below will the process run after every iteration of loop.

architecture structure
begins

a<="00000000";
for i in 1 to 256 loop
a<=a+"1";
end loop;

process(a,clk)                                 --since a changes in
every iteration will process run
begin                                              --after every
iteration

--body of process

end process;

end architecture;

Hi,

FOR LOOP are only allowed inside a process, procedure or function.

/Peter

 

[Mike Treseler]

FOR LOOP are only allowed inside a process, procedure or function.

Here's function example:

function power2(arg : unsigned) return boolean is
variable bit_cnt_v : natural;
begin
bit_cnt_v := 0;
scan : for i in arg'range loop
if arg(i) = '1' then
got_one: bit_cnt_v := bit_cnt_v + 1;
end if;
if bit_cnt_v > 1 then
not_a_power_of_2 : return false;
end if;
end loop scan;
just_one:if bit_cnt_v = 1 then
is_a_power_of_2 : return true;
else
return false;
end if just_one;
end function power2;




-- Mike Treseler