C
Cliff Curry
Guest
I am looking for some help or explanation.
I am getting the warning message
" P0: Missing bulk-drain diode would be forward biased"
during IC and at the beginning of a transient analysis.
Where P0 is a 4 terminal pmos transistor in an inverter, with the bulk and
source both connected to vdd.
I am using bsim3v3 models, and am specifying AD=8e-13 and AS=8e-13.
If I use a --different---- bsim3v3 model for the transistor, however, I do
not get this warning.
First, what does it mean that the bulk drain diode is missing?
Second, how could the model make a bulk-drain diode be missing or not?
Third, my voltage waveforms do not show the drain of the transistor getting
anywhere near vdd, so I don't think there is a
problem with a forward biased diode anyway.
Does anyone have any ideas?
Thanks,
Cliff Curry
"
I am getting the warning message
" P0: Missing bulk-drain diode would be forward biased"
during IC and at the beginning of a transient analysis.
Where P0 is a 4 terminal pmos transistor in an inverter, with the bulk and
source both connected to vdd.
I am using bsim3v3 models, and am specifying AD=8e-13 and AS=8e-13.
If I use a --different---- bsim3v3 model for the transistor, however, I do
not get this warning.
First, what does it mean that the bulk drain diode is missing?
Second, how could the model make a bulk-drain diode be missing or not?
Third, my voltage waveforms do not show the drain of the transistor getting
anywhere near vdd, so I don't think there is a
problem with a forward biased diode anyway.
Does anyone have any ideas?
Thanks,
Cliff Curry
"