D
Dave Hitchins
Guest
I\'m having problems with the SDA part of an IIC implementation in a AMD 22V10C (not from China!). I can Output data, to the SDA output, but I\'m not able to read the SDA input! My CUPL equations, as a whole, compile OK using WINCUPL and the .JED file programs OK.
These are the intermediate declarations:
FCD7Â Â = !nPFC & A7 & A6 & !A5 & A4 & !A3 & A2 & A1 & A0;
SCLHÂ Â = FCD7 & !BnWR & D6 ;
SCLL = FCD7 & !BnWR & !D6 ;
SDAH = FCD7 & !BnWR & D7 ;
SDAL = FCD7 & !BnWR & !D7 ;
These are the outputs associated with SDA I/O:
PIN 15Â Â = D7Â Â Â Â Â Â Â Â Â Â /* Data line 7 */
PIN 18Â Â = SDAOEÂ Â Â /* SDA output control latch */
PIN 19Â Â = SDAÂ Â Â Â Â Â Â Â /* SDA I/O pin */
This is the equation for the SDA output control latch and sets the SDA output Low when needed. This sections works just fine.
SDAOEÂ Â =Â Â SDAHÂ Â Â Â /* Set high - write FCD7 with D7=H */
              # !SDAH & !SDAL & SDAOE     /* Set low - write FCD7 with D7=0 */
              # !nRST ;    /* Set high - on reset */
This is the SDA output pin. Pulled high, externally, with a 4K7 resistor. Works as an output just fine.
SDA.OEÂ Â = !SDAOE ;Â Â Â Â /* Only on when \'LOW\' output required */
SDA Â Â = SDAOE ;Â Â Â Â /* Always low when output enabled */
This is the problem pin.
D7 Â = SDA ;Â Â Â Â /* SDA input transferred to D7 output on read of FCD7 */
D7.OEÂ Â = FCD7 & BnWR ;
If I toggle the SDAOE latch I can read its state through D7 e.g. I can read SDA output, however, if I set the SDAOE latch High, ready for read of the SDA INPUT, I can\'t then read the input - I just read a High value on D7. It seems that the path from the SDA pin through to the & array isn\'t there!
Anybody have any clues to what\'s going wrong? Thanks . . . Dave H.
These are the intermediate declarations:
FCD7Â Â = !nPFC & A7 & A6 & !A5 & A4 & !A3 & A2 & A1 & A0;
SCLHÂ Â = FCD7 & !BnWR & D6 ;
SCLL = FCD7 & !BnWR & !D6 ;
SDAH = FCD7 & !BnWR & D7 ;
SDAL = FCD7 & !BnWR & !D7 ;
These are the outputs associated with SDA I/O:
PIN 15Â Â = D7Â Â Â Â Â Â Â Â Â Â /* Data line 7 */
PIN 18Â Â = SDAOEÂ Â Â /* SDA output control latch */
PIN 19Â Â = SDAÂ Â Â Â Â Â Â Â /* SDA I/O pin */
This is the equation for the SDA output control latch and sets the SDA output Low when needed. This sections works just fine.
SDAOEÂ Â =Â Â SDAHÂ Â Â Â /* Set high - write FCD7 with D7=H */
              # !SDAH & !SDAL & SDAOE     /* Set low - write FCD7 with D7=0 */
              # !nRST ;    /* Set high - on reset */
This is the SDA output pin. Pulled high, externally, with a 4K7 resistor. Works as an output just fine.
SDA.OEÂ Â = !SDAOE ;Â Â Â Â /* Only on when \'LOW\' output required */
SDA Â Â = SDAOE ;Â Â Â Â /* Always low when output enabled */
This is the problem pin.
D7 Â = SDA ;Â Â Â Â /* SDA input transferred to D7 output on read of FCD7 */
D7.OEÂ Â = FCD7 & BnWR ;
If I toggle the SDAOE latch I can read its state through D7 e.g. I can read SDA output, however, if I set the SDAOE latch High, ready for read of the SDA INPUT, I can\'t then read the input - I just read a High value on D7. It seems that the path from the SDA pin through to the & array isn\'t there!
Anybody have any clues to what\'s going wrong? Thanks . . . Dave H.