Help: Configure PCI Device in Windows 2k

K

Kang Liat Chuan

Guest
Dear experts in this area,

I am trying to configure a PCI board plugged into my PC, running Windows
2000 sp3.
This board is the Memec PCI development board, with a Spartan II-200 FPGA
connected to the 32-bit PCI bus.

I figured that either BIOS or Windows configures the PCI board at bootup,
and assigns
the BAR0 etc. I am using an FPGA with the Xilinx PCI32 LogiCore. Hence, the
Command and Status Register bit 2 (Bus Master) is '0' at startup. How can I
set it
to '1' after startup?

For those of you familiar with the Xilinx PCI32 LogiCore, I've thought about
hard
setting the CFG_SELF bit to '1', which will fool the core to initiate master
transactions.
But in simulation, I see that the ADIO bus does not get the date from the AD
bus!
A more tedious way is to self configure the PCI core to master, but I am
seeking an
easier way. My firmware colleague told me I have to make use of the
"pci.sys" driver
in Windows.

I am not a programmer, and am not familiar with the "pci.sys" driver. Is
there an easier
way to do this?

Thanks and regards,
LC
 
Hello,

I figured that either BIOS or Windows configures the PCI board
at bootup, and assigns the BAR0 etc. I am using an FPGA with the
Xilinx PCI32 LogiCore. Hence, the Command and Status Register bit 2
is '0' at startup. How can I set it to '1' after startup?
Click to expand...
This is the responsibility of the device driver for your device.
If you don't have one, you will need to write one. You can get
the Windows 2000 DDK from Microsoft for examples of how to do it.
Alternately you can purchase a device driver development kit. I
can think of at least three vendors of such kits.

Basically, when your driver loads, it needs to locate the hardware
and then read what's in the BARs to know what addresses it should
use to access the hardware. Also, at that time, you would want to
clear all the bits in the status regisiter, and then set whatever
bits you want in the command register. After that, your hardware
is ready to go...

For those of you familiar with the Xilinx PCI32 LogiCore, I've
thought about hard setting the CFG_SELF bit to '1', which will
fool the core to initiate master transactions. But in simulation,
I see that the ADIO bus does not get the date from the AD bus!
Click to expand...
Don't do that; this signal is intended to be used only to enable
the core to perform CONFIG reads and writes to its own SELF. And
you would only want to do that if you were in some kind of an
embedded system with no host.

A more tedious way is to self configure the PCI core to master,
but I am seeking an easier way.
Click to expand...
You still shouldn't do that, unless you are in an embedded system
with no host (or you are the host) but that isn't the case if you
are in a Windows 2000 system.

I'm not a device driver writer (or even a programmer) and I was
able to leverage stuff in the DDK and a commercial device driver
development kit to get a driver working in Windows 2000. I took
one of the examples that was closest to what I wanted to do and
then modified it.

Eric
 
Thanks Eric.

I did receive 2 drivers (and their source codes, after I ask) from Memec
Design Services,
but they only let us access the USERAPP. No provision for configuring the
PCI core.

I understand what you described is needed for writing the driver. But when
Memec sells
the PCI development board, shouldn't it cater to the need to configure PCI
master? The
example files are all similar to Xilinx example (ping64), including the ucf
file. I am just
dissappointed that we have to do these extra bits. We had assumed it will be
there.

Regards,
LC

"Eric Crabill" <eric.crabill@xilinx.com> wrote in message
news:402BF6C4.D142FCD5@xilinx.com...
Hello,

I figured that either BIOS or Windows configures the PCI board
at bootup, and assigns the BAR0 etc. I am using an FPGA with the
Xilinx PCI32 LogiCore. Hence, the Command and Status Register bit 2
is '0' at startup. How can I set it to '1' after startup?

This is the responsibility of the device driver for your device.
If you don't have one, you will need to write one. You can get
the Windows 2000 DDK from Microsoft for examples of how to do it.
Alternately you can purchase a device driver development kit. I
can think of at least three vendors of such kits.

Basically, when your driver loads, it needs to locate the hardware
and then read what's in the BARs to know what addresses it should
use to access the hardware. Also, at that time, you would want to
clear all the bits in the status regisiter, and then set whatever
bits you want in the command register. After that, your hardware
is ready to go...

For those of you familiar with the Xilinx PCI32 LogiCore, I've
thought about hard setting the CFG_SELF bit to '1', which will
fool the core to initiate master transactions. But in simulation,
I see that the ADIO bus does not get the date from the AD bus!

Don't do that; this signal is intended to be used only to enable
the core to perform CONFIG reads and writes to its own SELF. And
you would only want to do that if you were in some kind of an
embedded system with no host.

A more tedious way is to self configure the PCI core to master,
but I am seeking an easier way.

You still shouldn't do that, unless you are in an embedded system
with no host (or you are the host) but that isn't the case if you
are in a Windows 2000 system.

I'm not a device driver writer (or even a programmer) and I was
able to leverage stuff in the DDK and a commercial device driver
development kit to get a driver working in Windows 2000. I took
one of the examples that was closest to what I wanted to do and
then modified it.

Eric
Click to expand...
 
www.pcitree.de

The program can read/write config/memory space in winxp/nt/2k.

Now I can get back to VHDL.

Regards,
LC

"Kang Liat Chuan" <liat-chuan_kang@agilent.com> wrote in message
news:1076580017.344075@cswreg.cos.agilent.com...
Dear experts in this area,

I am trying to configure a PCI board plugged into my PC, running Windows
2000 sp3.
This board is the Memec PCI development board, with a Spartan II-200 FPGA
connected to the 32-bit PCI bus.

I figured that either BIOS or Windows configures the PCI board at bootup,
and assigns
the BAR0 etc. I am using an FPGA with the Xilinx PCI32 LogiCore. Hence,
the
Command and Status Register bit 2 (Bus Master) is '0' at startup. How can
I
set it
to '1' after startup?

For those of you familiar with the Xilinx PCI32 LogiCore, I've thought
about
hard
setting the CFG_SELF bit to '1', which will fool the core to initiate
master
transactions.
But in simulation, I see that the ADIO bus does not get the date from the
AD
bus!
A more tedious way is to self configure the PCI core to master, but I am
seeking an
easier way. My firmware colleague told me I have to make use of the
"pci.sys" driver
in Windows.

I am not a programmer, and am not familiar with the "pci.sys" driver. Is
there an easier
way to do this?

Thanks and regards,
LC
Click to expand...
 
You must log in or register to reply here.

Welcome to EDABoard.com

Sponsor

Back
Top