help! Can't remember name of program.

[unfrostedpoptart]

Hi.

I'm totally blanking and need help. A year or two ago, I found a
program that would take a Verilog design and pre-process all the
`ifdefs and `includes. This was really handy, since it could take a
large design, with lots of files and includes and ifdef switches, and
output the resulting verilog code.

Does anyone know what I'm talking about? I could really use it now,
but I can't remember what it was and I can't find it with web searches.

Thanks!!!

David

 

[Stephen Williams]

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unfrostedpoptart wrote:

Hi.

I'm totally blanking and need help. A year or two ago, I found a
program that would take a Verilog design and pre-process all the
`ifdefs and `includes. This was really handy, since it could take a
large design, with lots of files and includes and ifdef switches, and
output the resulting verilog code.

Does anyone know what I'm talking about? I could really use it now,
but I can't remember what it was and I can't find it with web searches.

You can use the -E flag to iverilog to get that behavior.

- --
Steve Williams "The woods are lovely, dark and deep.
steve at icarus.com But I have promises to keep,
http://www.icarus.com and lines to code before I sleep,
http://www.picturel.com And lines to code before I sleep."
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.2.5 (GNU/Linux)
Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org

iD8DBQFD7S2TrPt1Sc2b3ikRAsw4AKCqWScLAmrSoznuTga+5oMqUkw6pACgwEqu
qH01ZhDkdtP2Cd6vfwuJY3M=
=bIvr
-----END PGP SIGNATURE-----

 

[Hal Murray]

I'm totally blanking and need help. A year or two ago, I found a
program that would take a Verilog design and pre-process all the
`ifdefs and `includes. This was really handy, since it could take a
large design, with lots of files and includes and ifdef switches, and
output the resulting verilog code.

cpp is the standard c preprocessor.

My Linux box has a man page. It's often (well, maybe occasionally)
used for non-c hacks. Works great with make.

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[Jason Zheng]

To use cpp, you first have to replace all `include with #include:

sed 's/`include/#include/g' | cpp -

However, cpp also has the unfortunate side-effect of stripping all
comments, which you may not want to lose at times.

~jz

Hal Murray wrote:

I'm totally blanking and need help. A year or two ago, I found a
program that would take a Verilog design and pre-process all the
`ifdefs and `includes. This was really handy, since it could take a
large design, with lots of files and includes and ifdef switches, and
output the resulting verilog code.


cpp is the standard c preprocessor.

My Linux box has a man page. It's often (well, maybe occasionally)
used for non-c hacks. Works great with make.

 

[Jason Zheng]

To use cpp, you first have to replace all `include with #include:

sed 's/`include/#include/g' | cpp -P -CC -

-P: don't generate line marks which will confuse verilog simulators
-CC: don't earase comments

~jz

Hal Murray wrote:

I'm totally blanking and need help. A year or two ago, I found a
program that would take a Verilog design and pre-process all the
`ifdefs and `includes. This was really handy, since it could take a
large design, with lots of files and includes and ifdef switches, and
output the resulting verilog code.


cpp is the standard c preprocessor.

My Linux box has a man page. It's often (well, maybe occasionally)
used for non-c hacks. Works great with make.

 

[Ajeetha]

If you use VCS, -Xman=4 option should do what you are looking for - ina
file named tokens.v

HTH
Ajeetha, CVC
www.noveldv.com