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Design an Xilinx Spartan2 FPGA (xc2s100) using VHDL to function as a
RISC Microprocessor.
The microcomputer has an eight bit data input, a clock input, a reset
input, a 'read data from input' input, a 'write data to output' input,
a start input, and a nine bit data output. The program code will be
loaded into a program memory as part of the VHDL file - It will not
be externally programmed. The input data must be written into the data
memory. The microcomputer is to consist of the following components:
A Two Register ALU
A Data Memory
A Program Memory
A Control Unit.
Each component should consitute a separate VHDL module. The four
modules will then be joined using a top level module which may be a
structural VHDL module or a Schematic. Design each component in turn
in the order listed above. You do not need to complete all the modules
- do what you can. This assessment is designed to cover all ability
levels. You must start with the ALU. You may improve the
specification of the design as long as you detail and justify the
changes you make. Equally you may simplifiy the design should major
problems occur.
The Two Register ALU
The two register ALU is similar in functionality to the 74LS382. The
ALU has two eight bit inputs (to X and Y registers), an eight bit
output (Z), and two status pins for carry out and overflow (2's
Complement Arithmetc). The ALU should have four function pins (S0 -
S3) to select the operation on registers X and Y as defined below.
S0 S1 S2 S3 Operation
0 0 0 0 RESET all outputs to 0
0 0 0 1 Y minus X
0 0 1 0 X minus Y
0 0 1 1 X plus Y
0 1 0 0 X exOR Y
0 1 0 1 X OR Y
0 1 1 0 X AND Y
0 1 1 1 SET all outputs to 1
The Data Memory
The data memory shall have an address width of four bits and capable
of storing up to eight bits of data at each address - In total 16
bytes of data can be stored .
4 bit Address
8 bit
Data
0 0 0 1 0 0 0 0 0 1 0 0
The Program Memory
The program memory be capable of storing 32 lines of program code.
Each code line shall consist of a four bit operand and a eight bit data
address - only the lower five address bits are actually needed. The
program code will be loaded into a program memory as part of the VHDL
file - It will not be externally programmed. The operand selects the
ALU or Control function to be executed.
4 bit Instruction
8 bit
Address
0 0 0 1 0 0 0 0 0 1 0 0
The Control Module
The control module is the most difficult par tof the microcomputer to
program. The control module is a state machine which controls the
sequence and timing of the microcomputer operations.
The control module must carry out the following operations:
1. The serial input data must be written into the data memory on each
clock pulse when data input is high.
2. The address of the program memory must be set to the start when
start input goes high.
3. The program must be executed synchronously, one line at a time.
4. The operand of the program line must select the ALU function.
5. The data addressed in the program line must be sent to the ALU
input.
6. Increment the program counter.
7. The output of the ALU must set to zero when reset input is high.
Three Control operations require the use of opcodes to address the Data
Memory:
8. Load Register X from Data Memory Location
9. Load Register Y from Data Memory Location
10. Write to Data Memory from Register X
S0 S1 S2 S3 Operation
1 0 0 0 Load Register X from Data Memory Location (Read)
1 0 0 1 Load Register Y from Data Memory Location (Read)
1 0 1 0 Write to Data Memory from Register X (Write)
The Test Program
The test program is to take four bytes of serial input data: A, B, C,
and D and produce an output byte F, after executing the following
arithmetic operations.
F = (A minus B) exOR (C plus D)
Design an Xilinx Spartan2 FPGA (xc2s100) using VHDL to function as a
RISC Microprocessor.
The microcomputer has an eight bit data input, a clock input, a reset
input, a 'read data from input' input, a 'write data to output' input,
a start input, and a nine bit data output. The program code will be
loaded into a program memory as part of the VHDL file - It will not
be externally programmed. The input data must be written into the data
memory. The microcomputer is to consist of the following components:
A Two Register ALU
A Data Memory
A Program Memory
A Control Unit.
Each component should consitute a separate VHDL module. The four
modules will then be joined using a top level module which may be a
structural VHDL module or a Schematic. Design each component in turn
in the order listed above. You do not need to complete all the modules
- do what you can. This assessment is designed to cover all ability
levels. You must start with the ALU. You may improve the
specification of the design as long as you detail and justify the
changes you make. Equally you may simplifiy the design should major
problems occur.
The Two Register ALU
The two register ALU is similar in functionality to the 74LS382. The
ALU has two eight bit inputs (to X and Y registers), an eight bit
output (Z), and two status pins for carry out and overflow (2's
Complement Arithmetc). The ALU should have four function pins (S0 -
S3) to select the operation on registers X and Y as defined below.
S0 S1 S2 S3 Operation
0 0 0 0 RESET all outputs to 0
0 0 0 1 Y minus X
0 0 1 0 X minus Y
0 0 1 1 X plus Y
0 1 0 0 X exOR Y
0 1 0 1 X OR Y
0 1 1 0 X AND Y
0 1 1 1 SET all outputs to 1
The Data Memory
The data memory shall have an address width of four bits and capable
of storing up to eight bits of data at each address - In total 16
bytes of data can be stored .
4 bit Address
8 bit
Data
0 0 0 1 0 0 0 0 0 1 0 0
The Program Memory
The program memory be capable of storing 32 lines of program code.
Each code line shall consist of a four bit operand and a eight bit data
address - only the lower five address bits are actually needed. The
program code will be loaded into a program memory as part of the VHDL
file - It will not be externally programmed. The operand selects the
ALU or Control function to be executed.
4 bit Instruction
8 bit
Address
0 0 0 1 0 0 0 0 0 1 0 0
The Control Module
The control module is the most difficult par tof the microcomputer to
program. The control module is a state machine which controls the
sequence and timing of the microcomputer operations.
The control module must carry out the following operations:
1. The serial input data must be written into the data memory on each
clock pulse when data input is high.
2. The address of the program memory must be set to the start when
start input goes high.
3. The program must be executed synchronously, one line at a time.
4. The operand of the program line must select the ALU function.
5. The data addressed in the program line must be sent to the ALU
input.
6. Increment the program counter.
7. The output of the ALU must set to zero when reset input is high.
Three Control operations require the use of opcodes to address the Data
Memory:
8. Load Register X from Data Memory Location
9. Load Register Y from Data Memory Location
10. Write to Data Memory from Register X
S0 S1 S2 S3 Operation
1 0 0 0 Load Register X from Data Memory Location (Read)
1 0 0 1 Load Register Y from Data Memory Location (Read)
1 0 1 0 Write to Data Memory from Register X (Write)
The Test Program
The test program is to take four bytes of serial input data: A, B, C,
and D and produce an output byte F, after executing the following
arithmetic operations.
F = (A minus B) exOR (C plus D)