Heirarchical path to the net

Guest
All,

At a previous company I worked for I had available a script that
traced the path of a net from child or leaf cell to the parent. The
script was run and it used .sch files(we use Calibre, so AIF files are
similar) and it traced every net from the child pin up as far as it
went up the tree and placed it in a file. From there you could grep
for a child name in unix and see, for instance, if the signal at the
child was connected to a pad or was a signal with a wire spec at a
higher level, etc.

It looked like this

SignalName.TopLevelName.SignalName.LeafOne.SignalName.LeafTwo.....

Why the script traced up is because some signals have fan outs. IE, A
signal at a high level of heirarchy could go to many leafcells.
Therefore, the script used a heirarchial tree and traced from the
lowest leafcells on the tree up.

Does anyone have anything like this? I did find the post below by
Andrew, but I don't think I got it to work as described. I was
expecting to run the function wrapped in the form and upon selecting a
signal get:

en.instname.in, ect..... something of this nature

Instead I got:

/en

Anyways any help would be appreciated,
Eric

I found this post by Andrew, I had the Analog environment up.

"My guess is that you want to use asiSelectNet() or asiSelectTerm().
For
example, this code snippet shows you how to do this:


hiCreateAppForm(
?name 'MYform
?fields list(
hiCreateStringField(
?name 'net
?prompt "Net"
)
hiCreateButton(
?name 'select
?buttonText "Select"
?callback "asiSelectNet('net ?prompt \"Select Net\")"
)
)
)


; need to have the session id attached to the form
MYform->asiSession=asiGetCurrentSession()


hiDisplayForm(MYform)


This just creates a simple form, with two fields (I didn't bother
about
formatting them nicely), one which is a button. When you click on
the Select button, it prompts you to select something in the
schematic, and will return the My guess is that you want to use
asiSelectNet() or asiSelectTerm(). For
example, this code snippet shows you how to do this:


hiCreateAppForm(
?name 'MYform
?fields list(
hiCreateStringField(
?name 'net
?prompt "Net"
)
hiCreateButton(
?name 'select
?buttonText "Select"
?callback "asiSelectNet('net ?prompt \"Select Net\")"
)
)
)


; need to have the session id attached to the form
MYform->asiSession=asiGetCurrentSession()


hiDisplayForm(MYform)


This just creates a simple form, with two fields (I didn't bother
about
formatting them nicely), one which is a button. When you click on
the Select button, it prompts you to select something in the
schematic, and will return the hierarchical path to the net into
the form.


You need the Analog Design Environment open for this, but
apart from that it's pretty easy to use. These functions are
documented
in the Analog Design Environment SKILL Language Reference in the
chapter on Selection Functions (chapter 15 in IC50).


Regards,


Andrew."
 
eric.d.fitzsimmons@gmail.com wrote, on 03/05/09 14:02:
All,

At a previous company I worked for I had available a script that
traced the path of a net from child or leaf cell to the parent. The
script was run and it used .sch files(we use Calibre, so AIF files are
similar) and it traced every net from the child pin up as far as it
went up the tree and placed it in a file. From there you could grep
for a child name in unix and see, for instance, if the signal at the
child was connected to a pad or was a signal with a wire spec at a
higher level, etc.

It looked like this

SignalName.TopLevelName.SignalName.LeafOne.SignalName.LeafTwo.....

Why the script traced up is because some signals have fan outs. IE, A
signal at a high level of heirarchy could go to many leafcells.
Therefore, the script used a heirarchial tree and traced from the
lowest leafcells on the tree up.

Does anyone have anything like this? I did find the post below by
Andrew, but I don't think I got it to work as described. I was
expecting to run the function wrapped in the form and upon selecting a
signal get:

en.instname.in, ect..... something of this nature

Instead I got:

/en

Anyways any help would be appreciated,
Eric

I found this post by Andrew, I had the Analog environment up.

snipped
Click to expand...

I doubt that code was relevant - it was for creating a form in the simulation
environment, where you could fill in the form by selecting a net in the schematic.

I'm not entirely sure what you're asking for. Is this layout, or schematic? If
layout, is the layout done with VirtuosoXL (i.e. does it have connectivity?).
Have you got to leaf cell by pushing down the hierarchy?

So I'm not entirely sure I know what you really want...

Andrew.
 
eric.d.fitzsimmons@gmail.com wrote, on 03/06/09 14:04:
On Mar 5, 11:34 pm, Andrew Beckett <andr...@DcEaLdEeTnEcTe.HcIoSm
wrote:
eric.d.fitzsimm...@gmail.com wrote, on 03/05/09 14:02:



All,
At a previous company I worked for I had available a script that
traced the path of a net from child or leaf cell to the parent. The
script was run and it used .sch files(we use Calibre, so AIF files are
similar) and it traced every net from the child pin up as far as it
went up the tree and placed it in a file. From there you could grep
for a child name in unix and see, for instance, if the signal at the
child was connected to a pad or was a signal with a wire spec at a
higher level, etc.
It looked like this
SignalName.TopLevelName.SignalName.LeafOne.SignalName.LeafTwo.....
Why the script traced up is because some signals have fan outs. IE, A
signal at a high level of heirarchy could go to many leafcells.
Therefore, the script used a heirarchial tree and traced from the
lowest leafcells on the tree up.
Does anyone have anything like this? I did find the post below by
Andrew, but I don't think I got it to work as described. I was
expecting to run the function wrapped in the form and upon selecting a
signal get:
en.instname.in, ect..... something of this nature
Instead I got:
/en
Anyways any help would be appreciated,
Eric
I found this post by Andrew, I had the Analog environment up.
snipped

I doubt that code was relevant - it was for creating a form in the simulation
environment, where you could fill in the form by selecting a net in the schematic.

I'm not entirely sure what you're asking for. Is this layout, or schematic? If
layout, is the layout done with VirtuosoXL (i.e. does it have connectivity?).
Have you got to leaf cell by pushing down the hierarchy?

So I'm not entirely sure I know what you really want...

Andrew.- Hide quoted text -

- Show quoted text -

Andrew,

I am sorry I didn't describe it very well. Perhaps an example would
help.

Lets say I am drawing a leaf cell, cell at or near the bottom of a
hierarchial tree, and I have pins Inn, Out, En, Vdd and Vss.
The Skill script would work on the schematic to trace UP from each of
those pins to tell me what it is connected up the heirarchy until
termination.

En may be just connected to one level above this cell, so the script
would return:

i1.OneLevelUp/Enable/i5.LeafCellStart/En

Where from right to left, En is the pin at LeafCellStart and is
instance i5(may be used more than once). Enable is connected to En
of LeafCellStart at the OneLevelUp(instance name i1) cell. I would
know now En goes no further up the heirarchy than OneLevelUp.

Out

TopLevelParent/VXT/i1.OneLevelUp.Ext/i5LeafCellStart.Out

Here Out is connected to Ext OneLevelUp(really that is the name of the
cell :) and it is then connected to VXT at the top level of the
heirarchy tree.

So on and so forth....

Know this is the REALLY hard part. This kind of trace needs to work
on a Heirarchial Tree of the schematic as an input to the code and
trace from the bottom to termination and place the "trace" in a file
for all the nets. This is true since LeafCellStart could be used
more than once, but we don't care. Simply, start at the bottom of
the tree and work up and place the trace in a file(to be manipulated
in unix or perl). I don't care that I will end up with, in the
example above, with a trace from LeafCellStart up the heirarchy and
OneLevelUp. It matters not.

So, I believe the skill code would do the following. User brings up
top level schematic and runs code that generates the heirarchial
tree. Skill code chops this into levels based on depth. Say there
are 6 levels of heirarchy. One is top, 6 is bottom.

Level 6
All cells at this level. Run trace from these up and place in file.
Level 5
All cells at this level. Run trace from these up and place in file.
Level 4
All cells at this level. Run trace from these up and place in file.
Level 3
All cells at this level. Run trace from these up and place in file.
Level 2
All cells at this level. Run trace from these up and place in file.
Level 1
All cells at this level. Run trace from these up and place in file.

Why in the he** do I need this? I can think of two easy ones.

1). One, the hand drawn schematics I recieve are often hard to read.
Lets say my engineer tells me net VXO is critical and needs to have an
MCF of 1.0 and be 20 microns wide. If I had this file of traces, I
could just grep for VXO and I would know all the traces for the net!
What often happens is a leaf cell is drawn and it gets lost that Inn
is connected to VXO at the parent(or wherever). This can cause
rework or even silicon failure.

2).Devices(as well as devices in the periphery of these devices)
connected to a pad have different ESD_LUP DRC rules. If I am lead on
a project and have others drawing cells, I want to make sure that they
and I know what devices will be connected to the pad before work
begins.

I hope what I am asking for is clearer. I realize this is not a
simple thing to do, at least not for someone with my Skill level(pun
intended)

Thank you for your help!
Eric
Click to expand...
It sounds as if you may be after a flat netlister, which just outputs net names,
where the netNames are not mapped to (say) unique names - they are made up of
the hierarchical path to get to that leaf net.

One could be written with the fnl functions, I guess. Don't have one to hand...
that's probably easier than having to write your own hierarchy traverser which
handles iterated instances, busses and bundles and so on. These are in the OSS
(Open Simulation System) manual.

Another approach might be to use something like this code:

/* abGetHierNetName.il

Author A.D.Beckett
Group Custom IC (UK), Cadence Design Systems Ltd.
Language SKILL
Date Dec 13, 2004
Modified
By

Simple functions to retrieve the hierarchical net name
of a net in a design.

The GUI interface is abShowHierNetName()

***************************************************

SCCS Info: @(#) abGetHierNetName.il 12/13/04.15:16:23 1.1

*/

/*****************************************************************
* *
* (abGetHierNetName net @optional (window (hiGetCurrentWindow))) *
* *
* Given a net object, return the adjusted hierarchical net name. *
* By adjusted, we mean that the path is adjusted to the net name *
* at the highest level. *
* *
*****************************************************************/

(procedure (abGetHierNetName net @optional (window (hiGetCurrentWindow)))
(let (netName)
(setq netName
(strcat
"/"
(buildString
(foreach mapcar i (geGetHierMemInst window)
(dbGetMemName (dbGetq (car i) name) (cadr i)))
"/"
)
))
(setq netName
(if (netName=="/")
(strcat netName (dbGetq net name))
(strcat netName "/" (dbGetq net name))
))
(geGetAdjustedPath window netName)
))

/*******************************************************************
* *
* (abShowHierNetName) *
* *
* Very simple GUI which expects you to have a single wire segment *
* selected - and pops up a dialog box showing the hierarchical net *
* name. *
* *
*******************************************************************/

(procedure (abShowHierNetName)
(let ((selSet (geGetSelSet)))
(cond
((or (null selSet)
(cdr selSet)
(null (dbGetq (car selSet) net)))
(hiDisplayAppDBox
?name 'abShowHierNetNameDBox
?dboxBanner "Show Hier Net Name Error"
?dboxText "You must have a single wire selected"
?dialogType hicErrorDialog
?dialogStyle 'modal
?buttonLayout 'Close
)
)
(t
(hiDisplayAppDBox
?name 'abShowHierNetNameDBox
?dboxBanner "Show Hier Net Name"
?dboxText (abGetHierNetName (dbGetq (car selSet) net))
?dialogType hicInformationDialog
?dialogStyle 'modal
?buttonLayout 'Close
)
)
) ; cond
) ; let
) ; procedure



You push down through your schematic hierarchy to the leaf cell, and then select
a wire - and then call abShowHierNetName() - it will show you the "adjusted
path" (i.e. the name for the net the highest level of hierarchy).

I'm not sure whether that gives you an equivalent (but different) way of doing
what you want?

Andrew.
 
On Mar 5, 11:34 pm, Andrew Beckett <andr...@DcEaLdEeTnEcTe.HcIoSm>
wrote:
eric.d.fitzsimm...@gmail.com wrote, on 03/05/09 14:02:



All,

At a previous company I worked for I had available a script that
traced the path of a net from child or leaf cell to the parent.   The
script was run and it used .sch files(we use Calibre, so AIF files are
similar) and it traced every net from the child pin up as far as it
went up the tree and placed it in a file.   From there you could grep
for a child name in unix and see, for instance, if the signal at the
child was connected to a pad or was a signal with a wire spec at a
higher level, etc.

It looked like this

SignalName.TopLevelName.SignalName.LeafOne.SignalName.LeafTwo.....

Why the script traced up is because some signals have fan outs.  IE, A
signal at a high level of heirarchy could go to many leafcells.
Therefore, the script used a heirarchial tree and traced from the
lowest leafcells on the tree up.

Does anyone have anything like this?   I did find the post below by
Andrew, but I don't think I got it to work as described.    I was
expecting to run the function wrapped in the form and upon selecting a
signal get:

en.instname.in, ect..... something of this nature

Instead I got:

/en

Anyways any help would be appreciated,
Eric

I found this post by Andrew, I had the Analog environment up.

snipped

I doubt that code was relevant - it was for creating a form in the simulation
environment, where you could fill in the form by selecting a net in the schematic.

I'm not entirely sure what you're asking for. Is this layout, or schematic? If
layout, is the layout done with VirtuosoXL (i.e. does it have connectivity?).
Have you got to leaf cell by pushing down the hierarchy?

So I'm not entirely sure I know what you really want...

Andrew.- Hide quoted text -

- Show quoted text -
Click to expand...
Andrew,

I am sorry I didn't describe it very well. Perhaps an example would
help.

Lets say I am drawing a leaf cell, cell at or near the bottom of a
hierarchial tree, and I have pins Inn, Out, En, Vdd and Vss.
The Skill script would work on the schematic to trace UP from each of
those pins to tell me what it is connected up the heirarchy until
termination.

En may be just connected to one level above this cell, so the script
would return:

i1.OneLevelUp/Enable/i5.LeafCellStart/En

Where from right to left, En is the pin at LeafCellStart and is
instance i5(may be used more than once). Enable is connected to En
of LeafCellStart at the OneLevelUp(instance name i1) cell. I would
know now En goes no further up the heirarchy than OneLevelUp.

Out

TopLevelParent/VXT/i1.OneLevelUp.Ext/i5LeafCellStart.Out

Here Out is connected to Ext OneLevelUp(really that is the name of the
cell :) and it is then connected to VXT at the top level of the
heirarchy tree.

So on and so forth....

Know this is the REALLY hard part. This kind of trace needs to work
on a Heirarchial Tree of the schematic as an input to the code and
trace from the bottom to termination and place the "trace" in a file
for all the nets. This is true since LeafCellStart could be used
more than once, but we don't care. Simply, start at the bottom of
the tree and work up and place the trace in a file(to be manipulated
in unix or perl). I don't care that I will end up with, in the
example above, with a trace from LeafCellStart up the heirarchy and
OneLevelUp. It matters not.

So, I believe the skill code would do the following. User brings up
top level schematic and runs code that generates the heirarchial
tree. Skill code chops this into levels based on depth. Say there
are 6 levels of heirarchy. One is top, 6 is bottom.

Level 6
All cells at this level. Run trace from these up and place in file.
Level 5
All cells at this level. Run trace from these up and place in file.
Level 4
All cells at this level. Run trace from these up and place in file.
Level 3
All cells at this level. Run trace from these up and place in file.
Level 2
All cells at this level. Run trace from these up and place in file.
Level 1
All cells at this level. Run trace from these up and place in file.

Why in the he** do I need this? I can think of two easy ones.

1). One, the hand drawn schematics I recieve are often hard to read.
Lets say my engineer tells me net VXO is critical and needs to have an
MCF of 1.0 and be 20 microns wide. If I had this file of traces, I
could just grep for VXO and I would know all the traces for the net!
What often happens is a leaf cell is drawn and it gets lost that Inn
is connected to VXO at the parent(or wherever). This can cause
rework or even silicon failure.

2).Devices(as well as devices in the periphery of these devices)
connected to a pad have different ESD_LUP DRC rules. If I am lead on
a project and have others drawing cells, I want to make sure that they
and I know what devices will be connected to the pad before work
begins.

I hope what I am asking for is clearer. I realize this is not a
simple thing to do, at least not for someone with my Skill level(pun
intended)

Thank you for your help!
Eric
 
On Mar 6, 8:41 am, Andrew Beckett <andr...@DcEaLdEeTnEcTe.HcIoSm>
wrote:
eric.d.fitzsimm...@gmail.com wrote, on 03/06/09 14:04:





On Mar 5, 11:34 pm, Andrew Beckett <andr...@DcEaLdEeTnEcTe.HcIoSm
wrote:
eric.d.fitzsimm...@gmail.com wrote, on 03/05/09 14:02:

All,
At a previous company I worked for I had available a script that
traced the path of a net from child or leaf cell to the parent.   The
script was run and it used .sch files(we use Calibre, so AIF files are
similar) and it traced every net from the child pin up as far as it
went up the tree and placed it in a file.   From there you could grep
for a child name in unix and see, for instance, if the signal at the
child was connected to a pad or was a signal with a wire spec at a
higher level, etc.
It looked like this
SignalName.TopLevelName.SignalName.LeafOne.SignalName.LeafTwo.....
Why the script traced up is because some signals have fan outs.  IE, A
signal at a high level of heirarchy could go to many leafcells.
Therefore, the script used a heirarchial tree and traced from the
lowest leafcells on the tree up.
Does anyone have anything like this?   I did find the post below by
Andrew, but I don't think I got it to work as described.    I was
expecting to run the function wrapped in the form and upon selecting a
signal get:
en.instname.in, ect..... something of this nature
Instead I got:
/en
Anyways any help would be appreciated,
Eric
I found this post by Andrew, I had the Analog environment up.
snipped

I doubt that code was relevant - it was for creating a form in the simulation
environment, where you could fill in the form by selecting a net in the schematic.

I'm not entirely sure what you're asking for. Is this layout, or schematic? If
layout, is the layout done with VirtuosoXL (i.e. does it have connectivity?).
Have you got to leaf cell by pushing down the hierarchy?

So I'm not entirely sure I know what you really want...

Andrew.- Hide quoted text -

- Show quoted text -

Andrew,

I am sorry I didn't describe it very well.    Perhaps an example would
help.

Lets say I am drawing a leaf cell, cell at or near the bottom of a
hierarchial tree, and I have pins Inn, Out, En, Vdd and Vss.
The Skill script would work on the schematic to trace UP from each of
those pins to tell me what it is connected up the heirarchy until
termination.

En may be just connected to one level above this cell, so the script
would return:

i1.OneLevelUp/Enable/i5.LeafCellStart/En

Where from right to left, En is the pin at LeafCellStart and is
instance i5(may be used more than once).   Enable is connected to En
of LeafCellStart at the OneLevelUp(instance name i1) cell.   I would
know now En goes no further up the heirarchy than OneLevelUp.

Out

TopLevelParent/VXT/i1.OneLevelUp.Ext/i5LeafCellStart.Out

Here Out is connected to Ext OneLevelUp(really that is the name of the
cell :) and it is then connected to VXT at the top level of the
heirarchy tree.

So on and so forth....

Know this is the REALLY hard part.   This kind of trace needs to work
on a Heirarchial Tree of the schematic as an input to the code and
trace from the bottom to termination and place the "trace" in a file
for all the nets.    This is true since LeafCellStart could be used
more than once, but we don't care.   Simply, start at the bottom of
the tree and work up and place the trace in a file(to be manipulated
in unix or perl).    I don't care that I will end up with, in the
example above, with a trace from LeafCellStart up the heirarchy and
OneLevelUp.   It matters not.

So, I believe the skill code would do the following.   User brings up
top level schematic and runs code that generates the heirarchial
tree.   Skill code chops this into levels based on depth.   Say there
are 6 levels of heirarchy.  One is top, 6 is bottom.

Level 6
All cells at this level.   Run trace from these up and place in file.
Level 5
All cells at this level.   Run trace from these up and place in file.
Level 4
All cells at this level.   Run trace from these up and place in file.
Level 3
All cells at this level.   Run trace from these up and place in file.
Level 2
All cells at this level.   Run trace from these up and place in file.
Level 1
All cells at this level.   Run trace from these up and place in file.

Why in the he** do I need this?    I can think of two easy ones.

1). One, the hand drawn schematics I recieve are often hard to read.
Lets say my engineer tells me net VXO is critical and needs to have an
MCF of 1.0 and be 20 microns wide.   If I had this file of traces, I
could just grep for VXO and I would know all the traces for the net!
What often happens is a leaf cell is drawn and it gets lost that Inn
is connected to VXO at the parent(or wherever).   This can cause
rework or even silicon failure.

2).Devices(as well as devices in the periphery of these devices)
connected to a pad have different ESD_LUP DRC rules.  If I am lead on
a project and have others drawing cells, I want to make sure that they
and I know what devices will be connected to the pad before work
begins.

I hope what I am asking for is clearer.   I realize this is not a
simple thing to do, at least not for someone with my Skill level(pun
intended)

Thank you for your help!
Eric

It sounds as if you may be after a flat netlister, which just outputs net names,
where the netNames are not mapped to (say) unique names - they are made up of
the hierarchical path to get to that leaf net.

One could be written with the fnl functions, I guess. Don't have one to hand...
that's probably easier than having to write your own hierarchy traverser which
handles iterated instances, busses and bundles and so on. These are in the OSS
(Open Simulation System) manual.

Another approach might be to use something like this code:

/* abGetHierNetName.il

Author     A.D.Beckett
Group      Custom IC (UK), Cadence Design Systems Ltd.
Language   SKILL
Date       Dec 13, 2004
Modified
By

Simple functions to retrieve the hierarchical net name
of a net in a design.

The GUI interface is abShowHierNetName()

***************************************************

SCCS Info: @(#) abGetHierNetName.il 12/13/04.15:16:23 1.1

*/

/*****************************************************************
*                                                                *
* (abGetHierNetName net @optional (window (hiGetCurrentWindow))) *
*                                                                *
* Given a net object, return the adjusted hierarchical net name. *
* By adjusted, we mean that the path is adjusted to the net name *
*                     at the highest level.                      *
*                                                                *
*****************************************************************/

(procedure (abGetHierNetName net @optional (window (hiGetCurrentWindow)))
   (let (netName)
        (setq netName
             (strcat
              "/"
              (buildString
               (foreach mapcar i (geGetHierMemInst window)
                        (dbGetMemName (dbGetq (car i) name) (cadr i)))
               "/"
               )
              ))
        (setq netName
             (if (netName=="/")
                 (strcat netName (dbGetq net name))
                 (strcat netName "/" (dbGetq net name))
                 ))
        (geGetAdjustedPath window netName)
        ))

/*******************************************************************
*                                                                  *
*                       (abShowHierNetName)                        *
*                                                                  *
* Very simple GUI which expects you to have a single wire segment  *
* selected - and pops up a dialog box showing the hierarchical net *
*                              name.                               *
*                                                                  *
*******************************************************************/

(procedure (abShowHierNetName)
   (let ((selSet (geGetSelSet)))
        (cond
        ((or (null selSet)
             (cdr selSet)
             (null (dbGetq (car selSet) net)))
         (hiDisplayAppDBox
          ?name 'abShowHierNetNameDBox
          ?dboxBanner "Show Hier Net Name Error"
          ?dboxText "You must have a single wire selected"
          ?dialogType hicErrorDialog
          ?dialogStyle 'modal
          ?buttonLayout 'Close
          )
         )
        (t
         (hiDisplayAppDBox
          ?name 'abShowHierNetNameDBox
          ?dboxBanner "Show Hier Net Name"
          ?dboxText (abGetHierNetName (dbGetq (car selSet) net))
          ?dialogType hicInformationDialog
          ?dialogStyle 'modal
          ?buttonLayout 'Close
          )
         )
        ) ; cond
        ) ; let
   ) ; procedure

You push down through your schematic hierarchy to the leaf cell, and then select
a wire - and then call abShowHierNetName() - it will show you the "adjusted
path" (i.e. the name for the net the highest level of hierarchy).

I'm not sure whether that gives you an equivalent (but different) way of doing
what  you want?

Andrew.- Hide quoted text -

- Show quoted text -
Click to expand...
Andrew,

That is useful since if you pick on a child net it gives the top level
net. A user could use it to find nets connected to pads generally.

It isn't what I need though.

Thank you for your help,
Eric
 
On Mar 6, 8:41 am, Andrew Beckett <andr...@DcEaLdEeTnEcTe.HcIoSm>
wrote:
eric.d.fitzsimm...@gmail.com wrote, on 03/06/09 14:04:





On Mar 5, 11:34 pm, Andrew Beckett <andr...@DcEaLdEeTnEcTe.HcIoSm
wrote:
eric.d.fitzsimm...@gmail.com wrote, on 03/05/09 14:02:

All,
At a previous company I worked for I had available a script that
traced the path of a net from child or leaf cell to the parent.   The
script was run and it used .sch files(we use Calibre, so AIF files are
similar) and it traced every net from the child pin up as far as it
went up the tree and placed it in a file.   From there you could grep
for a child name in unix and see, for instance, if the signal at the
child was connected to a pad or was a signal with a wire spec at a
higher level, etc.
It looked like this
SignalName.TopLevelName.SignalName.LeafOne.SignalName.LeafTwo.....
Why the script traced up is because some signals have fan outs.  IE, A
signal at a high level of heirarchy could go to many leafcells.
Therefore, the script used a heirarchial tree and traced from the
lowest leafcells on the tree up.
Does anyone have anything like this?   I did find the post below by
Andrew, but I don't think I got it to work as described.    I was
expecting to run the function wrapped in the form and upon selecting a
signal get:
en.instname.in, ect..... something of this nature
Instead I got:
/en
Anyways any help would be appreciated,
Eric
I found this post by Andrew, I had the Analog environment up.
snipped

I doubt that code was relevant - it was for creating a form in the simulation
environment, where you could fill in the form by selecting a net in the schematic.

I'm not entirely sure what you're asking for. Is this layout, or schematic? If
layout, is the layout done with VirtuosoXL (i.e. does it have connectivity?).
Have you got to leaf cell by pushing down the hierarchy?

So I'm not entirely sure I know what you really want...

Andrew.- Hide quoted text -

- Show quoted text -

Andrew,

I am sorry I didn't describe it very well.    Perhaps an example would
help.

Lets say I am drawing a leaf cell, cell at or near the bottom of a
hierarchial tree, and I have pins Inn, Out, En, Vdd and Vss.
The Skill script would work on the schematic to trace UP from each of
those pins to tell me what it is connected up the heirarchy until
termination.

En may be just connected to one level above this cell, so the script
would return:

i1.OneLevelUp/Enable/i5.LeafCellStart/En

Where from right to left, En is the pin at LeafCellStart and is
instance i5(may be used more than once).   Enable is connected to En
of LeafCellStart at the OneLevelUp(instance name i1) cell.   I would
know now En goes no further up the heirarchy than OneLevelUp.

Out

TopLevelParent/VXT/i1.OneLevelUp.Ext/i5LeafCellStart.Out

Here Out is connected to Ext OneLevelUp(really that is the name of the
cell :) and it is then connected to VXT at the top level of the
heirarchy tree.

So on and so forth....

Know this is the REALLY hard part.   This kind of trace needs to work
on a Heirarchial Tree of the schematic as an input to the code and
trace from the bottom to termination and place the "trace" in a file
for all the nets.    This is true since LeafCellStart could be used
more than once, but we don't care.   Simply, start at the bottom of
the tree and work up and place the trace in a file(to be manipulated
in unix or perl).    I don't care that I will end up with, in the
example above, with a trace from LeafCellStart up the heirarchy and
OneLevelUp.   It matters not.

So, I believe the skill code would do the following.   User brings up
top level schematic and runs code that generates the heirarchial
tree.   Skill code chops this into levels based on depth.   Say there
are 6 levels of heirarchy.  One is top, 6 is bottom.

Level 6
All cells at this level.   Run trace from these up and place in file.
Level 5
All cells at this level.   Run trace from these up and place in file.
Level 4
All cells at this level.   Run trace from these up and place in file.
Level 3
All cells at this level.   Run trace from these up and place in file.
Level 2
All cells at this level.   Run trace from these up and place in file.
Level 1
All cells at this level.   Run trace from these up and place in file.

Why in the he** do I need this?    I can think of two easy ones.

1). One, the hand drawn schematics I recieve are often hard to read.
Lets say my engineer tells me net VXO is critical and needs to have an
MCF of 1.0 and be 20 microns wide.   If I had this file of traces, I
could just grep for VXO and I would know all the traces for the net!
What often happens is a leaf cell is drawn and it gets lost that Inn
is connected to VXO at the parent(or wherever).   This can cause
rework or even silicon failure.

2).Devices(as well as devices in the periphery of these devices)
connected to a pad have different ESD_LUP DRC rules.  If I am lead on
a project and have others drawing cells, I want to make sure that they
and I know what devices will be connected to the pad before work
begins.

I hope what I am asking for is clearer.   I realize this is not a
simple thing to do, at least not for someone with my Skill level(pun
intended)

Thank you for your help!
Eric

It sounds as if you may be after a flat netlister, which just outputs net names,
where the netNames are not mapped to (say) unique names - they are made up of
the hierarchical path to get to that leaf net.

One could be written with the fnl functions, I guess. Don't have one to hand...
that's probably easier than having to write your own hierarchy traverser which
handles iterated instances, busses and bundles and so on. These are in the OSS
(Open Simulation System) manual.

Another approach might be to use something like this code:

/* abGetHierNetName.il

Author     A.D.Beckett
Group      Custom IC (UK), Cadence Design Systems Ltd.
Language   SKILL
Date       Dec 13, 2004
Modified
By

Simple functions to retrieve the hierarchical net name
of a net in a design.

The GUI interface is abShowHierNetName()

***************************************************

SCCS Info: @(#) abGetHierNetName.il 12/13/04.15:16:23 1.1

*/

/*****************************************************************
*                                                                *
* (abGetHierNetName net @optional (window (hiGetCurrentWindow))) *
*                                                                *
* Given a net object, return the adjusted hierarchical net name. *
* By adjusted, we mean that the path is adjusted to the net name *
*                     at the highest level.                      *
*                                                                *
*****************************************************************/

(procedure (abGetHierNetName net @optional (window (hiGetCurrentWindow)))
   (let (netName)
        (setq netName
             (strcat
              "/"
              (buildString
               (foreach mapcar i (geGetHierMemInst window)
                        (dbGetMemName (dbGetq (car i) name) (cadr i)))
               "/"
               )
              ))
        (setq netName
             (if (netName=="/")
                 (strcat netName (dbGetq net name))
                 (strcat netName "/" (dbGetq net name))
                 ))
        (geGetAdjustedPath window netName)
        ))

/*******************************************************************
*                                                                  *
*                       (abShowHierNetName)                        *
*                                                                  *
* Very simple GUI which expects you to have a single wire segment  *
* selected - and pops up a dialog box showing the hierarchical net *
*                              name.                               *
*                                                                  *
*******************************************************************/

(procedure (abShowHierNetName)
   (let ((selSet (geGetSelSet)))
        (cond
        ((or (null selSet)
             (cdr selSet)
             (null (dbGetq (car selSet) net)))
         (hiDisplayAppDBox
          ?name 'abShowHierNetNameDBox
          ?dboxBanner "Show Hier Net Name Error"
          ?dboxText "You must have a single wire selected"
          ?dialogType hicErrorDialog
          ?dialogStyle 'modal
          ?buttonLayout 'Close
          )
         )
        (t
         (hiDisplayAppDBox
          ?name 'abShowHierNetNameDBox
          ?dboxBanner "Show Hier Net Name"
          ?dboxText (abGetHierNetName (dbGetq (car selSet) net))
          ?dialogType hicInformationDialog
          ?dialogStyle 'modal
          ?buttonLayout 'Close
          )
         )
        ) ; cond
        ) ; let
   ) ; procedure

You push down through your schematic hierarchy to the leaf cell, and then select
a wire - and then call abShowHierNetName() - it will show you the "adjusted
path" (i.e. the name for the net the highest level of hierarchy).

I'm not sure whether that gives you an equivalent (but different) way of doing
what  you want?

Andrew.- Hide quoted text -

- Show quoted text -
Click to expand...
Andrew,

This is useful, but not what I wanted.

Thank you for your help.
Eric
 
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