H Bridge Revisited

B

Big Matt

Guest
As per the suggestions I received in the last thread, I have come up
with a new version of my h bridge. The bridge itself can be found here:

http://cheapanet.com.au/~mattcad/hbnew.gif
and the input section is here:
http://cheapanet.com.au/~mattcad/hb2new.gif

I would once again appreciate any feedback you would like to offer.

Briefly the changes I made are:

* Switching of the FETS now done through a push-pull setup. By my
calculations the 68 ohm resistor should dissipate about 3/4 of a watt

* Deadtime. I calculated the required deadtime based upon the input
capacitance listed in the data sheet. I would guess the output
capacitance may have been more appropriate, but chose the input as it
was the larger of the two. Discharge time was calculated using RxC
through the 68 ohm resistor. I then doubled that number and use it as my
deadtime. I hope that was right??

Incidentally, should I drive the P chan FETS from the first inverter,
rather than from the n chan FETS. I'm thinking that the p chans may stay
on too long, as they will not switch off until the n chans are almost
fully off?

Many thanks again

Big Matt
 
Big Matt wrote:
As per the suggestions I received in the last thread, I have come up
with a new version of my h bridge. The bridge itself can be found here:

http://cheapanet.com.au/~mattcad/hbnew.gif
and the input section is here:
http://cheapanet.com.au/~mattcad/hb2new.gif

I would once again appreciate any feedback you would like to offer.

Briefly the changes I made are:

* Switching of the FETS now done through a push-pull setup. By my
calculations the 68 ohm resistor should dissipate about 3/4 of a watt

* Deadtime. I calculated the required deadtime based upon the input
capacitance listed in the data sheet. I would guess the output
capacitance may have been more appropriate, but chose the input as it
was the larger of the two. Discharge time was calculated using RxC
through the 68 ohm resistor. I then doubled that number and use it as my
deadtime. I hope that was right??

Incidentally, should I drive the P chan FETS from the first inverter,
rather than from the n chan FETS. I'm thinking that the p chans may stay
on too long, as they will not switch off until the n chans are almost
fully off?

Many thanks again

Big Matt
Click to expand...
Hi Matt,

swap the pnp and npn transistors around, and its sweet. The current
configuration will give shitloads of cross-conduction thru the npn & pnp
at every switching edge because:

1. FWD = +7.2V, Q12 off, q5 on.

2. FWD falls below 6.6V or so, Q12 turns on, Q5 still on

3. FWD falls below 0.6V or so, Q12 still on, Q5 starts to think about
turning off

4. after Tstorage + Tfall, Q5 finally gets around to turning off.


If you swap the pnps and npns, they end up common-collector (cuyrrent
gain but no voltage gain, exactly what you want) and the
cross-conduction goes away. You might then want to remove U2C,E as the
emitter-followers do not invert.

but that looks good. the edge delays are spot on.

R3 and R4 can connect to REV and FWD, at the moment the inverting
npn/pnp combo screws up your logic. So the npns and pnps must just be
drawn in thw wrong place - graphical typo (grypo?)


dont forget a decent cap across the +7.2V supply. A big one, and a nice
small one for the high frequencies....


Cheers
Terry
 
Terry Given wrote:
Big Matt wrote:

As per the suggestions I received in the last thread, I have come up
with a new version of my h bridge. The bridge itself can be found here:

http://cheapanet.com.au/~mattcad/hbnew.gif
and the input section is here:
http://cheapanet.com.au/~mattcad/hb2new.gif

I would once again appreciate any feedback you would like to offer.

Briefly the changes I made are:

* Switching of the FETS now done through a push-pull setup. By my
calculations the 68 ohm resistor should dissipate about 3/4 of a watt

* Deadtime. I calculated the required deadtime based upon the input
capacitance listed in the data sheet. I would guess the output
capacitance may have been more appropriate, but chose the input as it
was the larger of the two. Discharge time was calculated using RxC
through the 68 ohm resistor. I then doubled that number and use it as
my deadtime. I hope that was right??

Incidentally, should I drive the P chan FETS from the first inverter,
rather than from the n chan FETS. I'm thinking that the p chans may
stay on too long, as they will not switch off until the n chans are
almost fully off?

Many thanks again

Big Matt


Hi Matt,

swap the pnp and npn transistors around, and its sweet. The current
configuration will give shitloads of cross-conduction thru the npn & pnp
at every switching edge because:

1. FWD = +7.2V, Q12 off, q5 on.

2. FWD falls below 6.6V or so, Q12 turns on, Q5 still on

3. FWD falls below 0.6V or so, Q12 still on, Q5 starts to think about
turning off

4. after Tstorage + Tfall, Q5 finally gets around to turning off.


If you swap the pnps and npns, they end up common-collector (cuyrrent
gain but no voltage gain, exactly what you want) and the
cross-conduction goes away. You might then want to remove U2C,E as the
emitter-followers do not invert.

but that looks good. the edge delays are spot on.

R3 and R4 can connect to REV and FWD, at the moment the inverting
npn/pnp combo screws up your logic. So the npns and pnps must just be
drawn in thw wrong place - graphical typo (grypo?)


dont forget a decent cap across the +7.2V supply. A big one, and a nice
small one for the high frequencies....


Cheers
Terry
Click to expand...
Thanks Terry.
 
Big Matt wrote:
Terry Given wrote:

Big Matt wrote:

As per the suggestions I received in the last thread, I have come up
with a new version of my h bridge. The bridge itself can be found here:

http://cheapanet.com.au/~mattcad/hbnew.gif
and the input section is here:
http://cheapanet.com.au/~mattcad/hb2new.gif

I would once again appreciate any feedback you would like to offer.

Briefly the changes I made are:

* Switching of the FETS now done through a push-pull setup. By my
calculations the 68 ohm resistor should dissipate about 3/4 of a watt

* Deadtime. I calculated the required deadtime based upon the input
capacitance listed in the data sheet. I would guess the output
capacitance may have been more appropriate, but chose the input as it
was the larger of the two. Discharge time was calculated using RxC
through the 68 ohm resistor. I then doubled that number and use it as
my deadtime. I hope that was right??

Incidentally, should I drive the P chan FETS from the first inverter,
rather than from the n chan FETS. I'm thinking that the p chans may
stay on too long, as they will not switch off until the n chans are
almost fully off?

Many thanks again

Big Matt



Hi Matt,

swap the pnp and npn transistors around, and its sweet. The current
configuration will give shitloads of cross-conduction thru the npn &
pnp at every switching edge because:

1. FWD = +7.2V, Q12 off, q5 on.

2. FWD falls below 6.6V or so, Q12 turns on, Q5 still on

3. FWD falls below 0.6V or so, Q12 still on, Q5 starts to think about
turning off

4. after Tstorage + Tfall, Q5 finally gets around to turning off.


If you swap the pnps and npns, they end up common-collector (cuyrrent
gain but no voltage gain, exactly what you want) and the
cross-conduction goes away. You might then want to remove U2C,E as the
emitter-followers do not invert.

but that looks good. the edge delays are spot on.

R3 and R4 can connect to REV and FWD, at the moment the inverting
npn/pnp combo screws up your logic. So the npns and pnps must just be
drawn in thw wrong place - graphical typo (grypo?)


dont forget a decent cap across the +7.2V supply. A big one, and a
nice small one for the high frequencies....


Cheers
Terry


Thanks Terry.
Click to expand...
No worries. post some pics when you've built one :)
 
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