GPIO - general purpose input/output that is software controlled
SCAN CHAIN - for ASIC DFT test all the flip flops in the design are chained
together
so that a test pattern can be applied to verify the integrity of
the manufactured
chip. This chain of FFs is called a scan chain
BIST - built in self test ... this is usually associated with memories and
is also a DFT
feature for testing the integrity of your ASIC
ooops .. added a few of my own
DFT - design for testability
ASIC ... I'll leave that one for your homework assignement
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