K
KaRtiK
Guest
I found a good site for memory models in Verilog
http://www.deeps.org/hdl_models/memories.html
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| Kartik |
| www.cae.wisc.edu/~kartik |
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http://www.deeps.org/hdl_models/memories.html
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| Kartik |
| www.cae.wisc.edu/~kartik |
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