Getting started with VHDL and Verilog

Hi all,

My background is in Software Engineering C,C++,Java and Unix. I am
getting started with VHDL and Verilog. What is the good way/books/
websites/training to get started? I have B.S. and M.S. in Computer
Engineering. Also, what is the learning curve in VHDL and Verilog?

Please let me know.

Thanks
Jay

 

[beky4kr@gmail.com]

On 6 מאי, 21:08, jraj.thak...@gmail.com wrote:

Hi all,

My background is in Software Engineering C,C++,Java and Unix. I am
getting started with VHDL and Verilog. What is the good way/books/
websites/training to get started? I have B.S. and M.S. in Computer
Engineering. Also, what is the learning curve in VHDL and Verilog?

Please let me know.

Thanks
Jay

There is a very nice site with lots of free exmples/projects in both
verilog and VHDL, where you can see how simulate, synthesise and post
simulate.
http://bknpk.no-ip.biz/

 

[newbie]

On May 8, 11:35 am, "beky...@gmail.com" <beky...@gmail.com> wrote:

On 6 מאי, 21:08, jraj.thak...@gmail.com wrote:

Hi all,

My background is in Software Engineering C,C++,Java and Unix. I am
getting started with VHDL and Verilog. What is the good way/books/
websites/training to get started? I have B.S. and M.S. in Computer
Engineering. Also, what is the learning curve in VHDL and Verilog?

Please let me know.

Thanks
Jay

There is a very nice site with lots of free exmples/projects in both
verilog and VHDL, where you can see how simulate, synthesise and post
simulate.http://bknpk.no-ip.biz/

Hi Jay...
Found this
http://www.cracktheinterview.in/viewforum.php?f=43
Though not exactly what you are looking for, but might be of some
help...

-Amit