generics in vhdl

[nachzeher]

hello, i hope u can help me... i want to know if it's possible that
generics ports can change the default value assigned in the vhdl code when
i compile or i program... better said, what can i do with generics ports?
what are they useful for?

 

[Narendran Kumaraguru Nath]

"nachzeher" <ghouldemon@yahoo.com> wrote in message news:<9f9d53a74dce010613049d395d67dd9c@localhost.talkaboutprogramming.com>...

hello, i hope u can help me... i want to know if it's possible that
generics ports can change the default value assigned in the vhdl code when
i compile or i program... better said, what can i do with generics ports?
what are they useful for?

The answer to the first question depends on the compiler you use.
For modelsim there is an option "-G" in VCS the option is "-generic".
Better take a look at your compiler's user manual.

Generics in VHDL are used to construct parameterized hardware
components. Parameterized components make it possible to construct
standardized libraries of shared models.

The following links should help you understand

http://www.orcadpcb.com/kb_articles/cap02921.asp?bc=F
http://www.emba.uvm.edu/~jswift/uvm_class/notes/generics.html


Narendran Kumaraguru Nathan
TooMuch Semiconductor Solutions Pvt. Ltd.
www.toomuchsemi.com
A Bangalore based startup specialising on services in EDA &
Verification.

 

[Narendran Kumaraguru Nath]

nachzeher wrote:

hello, i hope u can help me... i want to know if it's possible that
generics ports can change the default value assigned in the vhdl code when
i compile or i program... better said, what can i do with generics ports?
what are they useful for?

The answer to the first question depends on the compiler you use.
For modelsim there is an option "-G" in VCS the option is "-generic".
Better take a look at your compiler's user manual.

Generics in VHDL are used to construct parameterized hardware
components. Parameterized components make it possible to construct
standardized libraries of shared models.

The following links should help you understand

http://www.orcadpcb.com/kb_articles/cap02921.asp?bc=F
http://www.emba.uvm.edu/~jswift/uvm_class/notes/generics.html


Narendran Kumaraguru Nathan
TooMuch Semiconductor Solutions Pvt. Ltd.
www.toomuchsemi.com
A Bangalore based startup specialising on services in EDA & Verification.

 

[Moti Cohen]

"nachzeher" <ghouldemon@yahoo.com> wrote in message news:<9f9d53a74dce010613049d395d67dd9c@localhost.talkaboutprogramming.com>...

hello, i hope u can help me... i want to know if it's possible that
generics ports can change the default value assigned in the vhdl code when
i compile or i program... better said, what can i do with generics ports?
what are they useful for?

The web is loaded with tutorial expalining this subject but since u
asked I'll try to explain

Generics are used in order for u to be able to declare constants in
the design in a generic way e.g. -

entity adder is
generic (bus_width : integer := 8);
Port ( a: in std_logic_vecor (bus_width-1 downto 0);
b: in std_logic(bus_width-1 downto 0);
res : out std_logic(bus_width downto 0));
end adder ;

architecture bhv of adder is
begin

process (a,b,res)
begin
res <= a + b;
end process;

end bhv;

in the example above the adder can be instantiated with the required
bus width just by setting the "bus_width" generic.