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Gallium Nitride has become well established, but the excitement now is
about gallium oxide.
Are any devices available yet?
https://spectrum.ieee.org/gallium-oxide-the-supercharged-semiconductor
Clifford Heath
Clifford Heath <no_spam@please.net> wrote:
Gallium Nitride has become well established, but the excitement now is
about gallium oxide.
Are any devices available yet?
https://spectrum.ieee.org/gallium-oxide-the-supercharged-semiconductor
Clifford Heath
Not likely. Maybe never. Quote:
The Achilles\' heel of this material is its thermal conductivity. It\'s bad.
Really bad. In fact, it\'s literally the worst of all semiconductors under
consideration for RF amplification or power switching.
You could have told us that before we had to waste valuable time reading
the entire article.
Clifford Heath <no_spam@please.net> wrote:
Gallium Nitride has become well established, but the excitement now is
about gallium oxide.
Are any devices available yet?
https://spectrum.ieee.org/gallium-oxide-the-supercharged-semiconductor
Clifford Heath
Not likely. Maybe never. Quote:
The Achilles\' heel of this material is its thermal conductivity. It\'s bad.
Really bad. In fact, it\'s literally the worst of all semiconductors under
consideration for RF amplification or power switching.
You could have told us that before we had to waste valuable time reading
the entire article.
Thanks. I\'ll keep that in mind before reading another of your posts.
In the meantime, I\'ll let others read your posts and see if they find them
useful.
PLONK
Clifford Heath <no_...@please.net> wrote:
Gallium Nitride has become well established, but the excitement now is
about gallium oxide.
Are any devices available yet?
https://spectrum.ieee.org/gallium-oxide-the-supercharged-semiconductor
Clifford Heath
Not likely. Maybe never. Quote:
The Achilles\' heel of this material is its thermal conductivity. It\'s bad.
Really bad. In fact, it\'s literally the worst of all semiconductors under
consideration for RF amplification or power switching.
On Wednesday, November 16, 2022 at 3:49:52 PM UTC-8, Mike Monett VE3BTI
wrote:
Clifford Heath <no_...@please.net> wrote:
Gallium Nitride has become well established, but the excitement now
is about gallium oxide.
Are any devices available yet?
https://spectrum.ieee.org/gallium-oxide-the-supercharged-semiconducto
r
Clifford Heath
Not likely. Maybe never. Quote:
The Achilles\' heel of this material is its thermal conductivity. It\'s
bad. Really bad. In fact, it\'s literally the worst of all
semiconductors under consideration for RF amplification or power
switching.
How important is that, though? SiC power devices are a thin epi layer
on top of a \'blank\' of not-so-pure SiC; if you can make a thin layer of
GaO on another material, it\'s the OTHER material\'s thermal conductivity
that takes the heat... literally.
Thin film transistors aren\'t used for power much, but they DO keep my
display running.
whit3rd <whit3rd@gmail.com> wrote:
On Wednesday, November 16, 2022 at 3:49:52 PM UTC-8, Mike Monett VE3BTI
wrote:
Clifford Heath <no_...@please.net> wrote:
Gallium Nitride has become well established, but the excitement now
is about gallium oxide.
Are any devices available yet?
https://spectrum.ieee.org/gallium-oxide-the-supercharged-semiconducto
r
Clifford Heath
Not likely. Maybe never. Quote:
The Achilles\' heel of this material is its thermal conductivity. It\'s
bad. Really bad. In fact, it\'s literally the worst of all
semiconductors under consideration for RF amplification or power
switching.
How important is that, though? SiC power devices are a thin epi layer
on top of a \'blank\' of not-so-pure SiC; if you can make a thin layer of
GaO on another material, it\'s the OTHER material\'s thermal conductivity
that takes the heat... literally.
Thin film transistors aren\'t used for power much, but they DO keep my
display running.
They discuss this in the article. Besides being difficult to do, it creates
lattice misalignments which produce lots of defects.
On Thu, 17 Nov 2022 04:01:25 -0000 (UTC), Mike Monett VE3BTI
spamme@not.com> wrote:
whit3rd <whit3rd@gmail.com> wrote:
On Wednesday, November 16, 2022 at 3:49:52 PM UTC-8, Mike Monett VE3BTI
wrote:
Clifford Heath <no_...@please.net> wrote:
Gallium Nitride has become well established, but the excitement now
is about gallium oxide.
Are any devices available yet?
https://spectrum.ieee.org/gallium-oxide-the-supercharged-semiconducto
r
Clifford Heath
Not likely. Maybe never. Quote:
The Achilles\' heel of this material is its thermal conductivity. It\'s
bad. Really bad. In fact, it\'s literally the worst of all
semiconductors under consideration for RF amplification or power
switching.
How important is that, though? SiC power devices are a thin epi layer
on top of a \'blank\' of not-so-pure SiC; if you can make a thin layer of
GaO on another material, it\'s the OTHER material\'s thermal conductivity
that takes the heat... literally.
Thin film transistors aren\'t used for power much, but they DO keep my
display running.
They discuss this in the article. Besides being difficult to do, it creates
lattice misalignments which produce lots of defects.
The EPC parts are GaN on silicon. They are great.
Silicon on sapphire has some good uses.
Putting things on top of other things.
John Larkin wrote:
On Thu, 17 Nov 2022 04:01:25 -0000 (UTC), Mike Monett VE3BTI
spamme@not.com> wrote:
whit3rd <whit3rd@gmail.com> wrote:
On Wednesday, November 16, 2022 at 3:49:52 PM UTC-8, Mike Monett VE3BTI
wrote:
Clifford Heath <no_...@please.net> wrote:
Gallium Nitride has become well established, but the excitement now
is about gallium oxide.
Are any devices available yet?
https://spectrum.ieee.org/gallium-oxide-the-supercharged-semiconducto
r
Clifford Heath
Not likely. Maybe never. Quote:
The Achilles\' heel of this material is its thermal conductivity. It\'s
bad. Really bad. In fact, it\'s literally the worst of all
semiconductors under consideration for RF amplification or power
switching.
How important is that, though? SiC power devices are a thin epi layer
on top of a \'blank\' of not-so-pure SiC; if you can make a thin layer of
GaO on another material, it\'s the OTHER material\'s thermal conductivity
that takes the heat... literally.
Thin film transistors aren\'t used for power much, but they DO keep my
display running.
They discuss this in the article. Besides being difficult to do, it creates
lattice misalignments which produce lots of defects.
The EPC parts are GaN on silicon. They are great.
Silicon on sapphire has some good uses.
Putting things on top of other things.
There are lots of tricks to deal with lattice mismatch over a limited
range. One very useful one is to dork the stoichiometry during epitaxy,
so that the \'lattice constant\' gradually changes over many atomic
layers. That reduces the local strain on the lattice enough that
dislocations don\'t have to take up the difference.
An older approach is to orient the crystal so that the surface
periodicity matches that of the epi. That\'s the classical
silicon-on-sapphire technology, but works in only a limited number of cases.
Controlled lattice strain is pretty useful sometimes, because it changes
the band structure and therefore the carrier mobility. (*)
One common example is SiGe, where lattice strain can nearly double the
mobility, making the transistors faster. (Mobility in germanium is much
higher than in silicon, which also helps a lot.)
A second example is InGaAs photodiodes, which are usually made on GaAs
substrates. The lattice constant depends on the stoichiometry, and an
unstrained (lattice-matched) InGaAs photodiode cuts off at about 1.7 um.
Grading the stoichiometry lets you make diodes at pretty well any
point in the (In,Ga)(As,Sb) system, so you can trade off the wavelength
range vs leakage and shunt resistance out to about 4 um, and maybe
further. One example is
https://discovery.ucl.ac.uk/1541016/3/Wu_InGaAs%20photodetectors_No%20mark.pdf>.
A third and completely different example is solar cells, where lattice
strain can be used to make a thin layer delaminate from the wafer, so
that there\'s much less wasted material. (See e.g.
https://iopscience.iop.org/article/10.1149/2.0171508jss>.)
Cheers
Phil Hobbs
(*) Mobility mu is the ratio of mean carrier speed to the electric
field. Since the charge per carrier is fixed,
mu goes as the reciprocal of the \'effective mass\' of a carrier. (The
Wiki article on effective mass is useful.)
In Newtonian mechanics, the relation between mass m, momentum p, and
kinetic energy E is
E = p**2 / m.
Effective mass of a carrier in a solid is defined similarly, as
m_eff = 2 / ( d**2 E / dp**2 )
so when looking for speed, we care a lot about the band curvature in
momentum-energy space.
On Thu, 17 Nov 2022 06:21:16 -0500, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:
John Larkin wrote:
On Thu, 17 Nov 2022 04:01:25 -0000 (UTC), Mike Monett VE3BTI
spamme@not.com> wrote:
whit3rd <whit3rd@gmail.com> wrote:
On Wednesday, November 16, 2022 at 3:49:52 PM UTC-8, Mike Monett VE3BTI
wrote:
Clifford Heath <no_...@please.net> wrote:
Gallium Nitride has become well established, but the excitement now
is about gallium oxide.
Are any devices available yet?
https://spectrum.ieee.org/gallium-oxide-the-supercharged-semiconducto
r
Clifford Heath
Not likely. Maybe never. Quote:
The Achilles\' heel of this material is its thermal conductivity. It\'s
bad. Really bad. In fact, it\'s literally the worst of all
semiconductors under consideration for RF amplification or power
switching.
How important is that, though? SiC power devices are a thin epi layer
on top of a \'blank\' of not-so-pure SiC; if you can make a thin layer of
GaO on another material, it\'s the OTHER material\'s thermal conductivity
that takes the heat... literally.
Thin film transistors aren\'t used for power much, but they DO keep my
display running.
They discuss this in the article. Besides being difficult to do, it creates
lattice misalignments which produce lots of defects.
The EPC parts are GaN on silicon. They are great.
Silicon on sapphire has some good uses.
Putting things on top of other things.
There are lots of tricks to deal with lattice mismatch over a limited
range. One very useful one is to dork the stoichiometry during epitaxy,
so that the \'lattice constant\' gradually changes over many atomic
layers. That reduces the local strain on the lattice enough that
dislocations don\'t have to take up the difference.
An older approach is to orient the crystal so that the surface
periodicity matches that of the epi. That\'s the classical
silicon-on-sapphire technology, but works in only a limited number of cases.
Controlled lattice strain is pretty useful sometimes, because it changes
the band structure and therefore the carrier mobility. (*)
One common example is SiGe, where lattice strain can nearly double the
mobility, making the transistors faster. (Mobility in germanium is much
higher than in silicon, which also helps a lot.)
A second example is InGaAs photodiodes, which are usually made on GaAs
substrates. The lattice constant depends on the stoichiometry, and an
unstrained (lattice-matched) InGaAs photodiode cuts off at about 1.7 um.
Grading the stoichiometry lets you make diodes at pretty well any
point in the (In,Ga)(As,Sb) system, so you can trade off the wavelength
range vs leakage and shunt resistance out to about 4 um, and maybe
further. One example is
https://discovery.ucl.ac.uk/1541016/3/Wu_InGaAs%20photodetectors_No%20mark.pdf>.
A third and completely different example is solar cells, where lattice
strain can be used to make a thin layer delaminate from the wafer, so
that there\'s much less wasted material. (See e.g.
https://iopscience.iop.org/article/10.1149/2.0171508jss>.)
Cheers
Phil Hobbs
(*) Mobility mu is the ratio of mean carrier speed to the electric
field. Since the charge per carrier is fixed,
mu goes as the reciprocal of the \'effective mass\' of a carrier. (The
Wiki article on effective mass is useful.)
In Newtonian mechanics, the relation between mass m, momentum p, and
kinetic energy E is
E = p**2 / m.
Effective mass of a carrier in a solid is defined similarly, as
m_eff = 2 / ( d**2 E / dp**2 )
so when looking for speed, we care a lot about the band curvature in
momentum-energy space.
I\'ve wondered about lattice mismatch. I can imagine a wafer that has
sorta periodic zones of decent and terrible alignment, moire\'
patterns, where they just throw away some fraction of the chips. That
might work for small stuff, like the EPC Ganfets. I wonder what their
yield is like, and how they test every tiny bga.
On 17/11/22 16:06, John Larkin wrote:
Silicon on sapphire has some good uses
A lot of the knowledge about how to make silicon on sapphire chips was
developed at Silanna and its precursors. Here\'s a picture of me holding
one of the wafers that Andy Brawley brought to his talk last Wednesday
night:
https://www.dropbox.com/s/1fsd4gs90r9mzpg/SiliconOnSapphire.jpg?dl=0
The sapphire is so transparent across a very wide range of wavelengths
that the chips are inherently radiation-hard, which is why their chips
were used in so many space applications, as well as e.g. the Minuteman
missiles.
The other main advantages of sapphire technology is that you
can easily integrate low-noise analog and high-speed digital on the same
chip without noise being transferred via the substrate, and also
implement piezo devices (SAW filters etc) in the same processing steps.
The Silanna factory was bull-dozed last year, despite being a very
profitable company, because although they had a 99 year lease on land
owned by Sydney Rail, SR exercised their option to terminate the lease
on 18 months notice, with zero compensation for the loss of the fab and
class 1 clean-rooms. Estimated minimum cost of relocation was over
$100M, and would take several years during which highly expert staff
would have to divide their attention between processing the multiple
thousands of wafers per week and the setup of the new facility. A tragic
loss to the whole world, and to Australia in particular.
Clifford Heath wrote:
On 17/11/22 16:06, John Larkin wrote:
Silicon on sapphire has some good uses
A lot of the knowledge about how to make silicon on sapphire chips was
developed at Silanna and its precursors. Here\'s a picture of me
holding one of the wafers that Andy Brawley brought to his talk last
Wednesday night:
https://www.dropbox.com/s/1fsd4gs90r9mzpg/SiliconOnSapphire.jpg?dl=0
The sapphire is so transparent across a very wide range of wavelengths
that the chips are inherently radiation-hard, which is why their chips
were used in so many space applications, as well as e.g. the Minuteman
missiles.
That isn\'t why.
The Silanna factory was bull-dozed last year,
Yikes, what a stupid contract. I\'m amazed that their bank would lend
them money to build a fab if they knew about that.
On 17/11/22 16:06, John Larkin wrote:
Silicon on sapphire has some good uses
A lot of the knowledge about how to make silicon on sapphire chips was
developed at Silanna and its precursors. Here\'s a picture of me holding
one of the wafers that Andy Brawley brought to his talk last Wednesday
night:
https://www.dropbox.com/s/1fsd4gs90r9mzpg/SiliconOnSapphire.jpg?dl=0
The sapphire is so transparent across a very wide range of wavelengths
that the chips are inherently radiation-hard, which is why their chips
were used in so many space applications, as well as e.g. the Minuteman
missiles. The other main advantages of sapphire technology is that you
can easily integrate low-noise analog and high-speed digital on the same
chip without noise being transferred via the substrate, and also
implement piezo devices (SAW filters etc) in the same processing steps.
The Silanna factory was bull-dozed last year, despite being a very
profitable company, because although they had a 99 year lease on land
owned by Sydney Rail, SR exercised their option to terminate the lease
on 18 months notice, with zero compensation for the loss of the fab and
class 1 clean-rooms. Estimated minimum cost of relocation was over
$100M, and would take several years during which highly expert staff
would have to divide their attention between processing the multiple
thousands of wafers per week and the setup of the new facility. A tragic
loss to the whole world, and to Australia in particular.