S
steve
Guest
Hi all,
I am trying to write a function which will accept an address and return the
8-bit value in an eeprom (SPI/Microwire). It seems that I can't toggle the
port i/o within the function. Like CS,SCK etc.
I was hoping to do something like this inside an init entity block:
-- pseudo code:
if reset then init<='0';
elsif(CLK'event and CLK='1') then
FirstVal=ReadByteEeprom(1);
SecondVal=ReadByteEeprom(2);
init<='1'; then this is a signal to the next block to initiate it's thing.
end if;
--
I get:"The target of this assignment must be a formal of the subprogram
"ReadByteEeprom" or one of its parents." for these lines --**
I basically wanted the function call since I could write them in order and
fill up the variables(or signals to other procedure blocks) used in the vhdl
from the eeprom. This is to be done once.
Should I really create a state machine or a procedure instead of a function?
I just liked the sequential ability of calling the function x times.
This code is quite incomplete, but maybe the idea will get across.
Please tell me how you guys/gals would usually do something like this.
Thankyou for your ideas. Steve
library IEEE;
use IEEE.STD_LOGIC_1164.all;
use IEEE.numeric_std.all;
entity Init is
port(
CLK : in std_logic;
RESET : in std_logic;
SO : in STD_LOGIC;
firstblock_verified : in std_logic;
SCK : out STD_LOGIC;
LOWCS : out STD_LOGIC;
SI : out STD_LOGIC;
LOWWP : out STD_LOGIC;
LOWHOLD : out STD_LOGIC;
init_verified : out std_logic
);
end Init;
architecture Init of Init is
--start of function
--impure to see CLK and RESET
impure function ReadByteEeprom (address : integer range 0 to 255) return
std_logic_vector is
variable BitCount:std_logic_vector(7 downto 0);
variable PulseCount:integer:=0;
begin
if (reset='0') then
BitCount:="00000000";
PulseCount:=0;
LOWCS<='1'; --** --haven't written any serial stuff yet.
elsif(CLK'event and CLK='1') then
LOWCS<='0'; --**
if(PulseCount=3)then
BitCount:="11110001";
elsif (address<=34)then
BitCount:="01010101";
end if;
PulseCount:=PulseCount+1;
end if;
return BitCount;
end;
--end of function
begin
LOWWP<='1'; -- allow writes
LOWHOLD<='1';
process (reset,firstblock_verified,CLK)
begin
if (reset='0') then --asynchronous RESET active low
LOWCS<='1'; --disable chip
init_verified<='0';
elsif(CLK'event and CLK='1') then
if( firstblock_verified='1')then
Red<=ReadByteEeprom(12);
--read constant array
init_verified<='1';
end if;
end if;
end process;
end Init;
I am trying to write a function which will accept an address and return the
8-bit value in an eeprom (SPI/Microwire). It seems that I can't toggle the
port i/o within the function. Like CS,SCK etc.
I was hoping to do something like this inside an init entity block:
-- pseudo code:
if reset then init<='0';
elsif(CLK'event and CLK='1') then
FirstVal=ReadByteEeprom(1);
SecondVal=ReadByteEeprom(2);
init<='1'; then this is a signal to the next block to initiate it's thing.
end if;
--
I get:"The target of this assignment must be a formal of the subprogram
"ReadByteEeprom" or one of its parents." for these lines --**
I basically wanted the function call since I could write them in order and
fill up the variables(or signals to other procedure blocks) used in the vhdl
from the eeprom. This is to be done once.
Should I really create a state machine or a procedure instead of a function?
I just liked the sequential ability of calling the function x times.
This code is quite incomplete, but maybe the idea will get across.
Please tell me how you guys/gals would usually do something like this.
Thankyou for your ideas. Steve
library IEEE;
use IEEE.STD_LOGIC_1164.all;
use IEEE.numeric_std.all;
entity Init is
port(
CLK : in std_logic;
RESET : in std_logic;
SO : in STD_LOGIC;
firstblock_verified : in std_logic;
SCK : out STD_LOGIC;
LOWCS : out STD_LOGIC;
SI : out STD_LOGIC;
LOWWP : out STD_LOGIC;
LOWHOLD : out STD_LOGIC;
init_verified : out std_logic
);
end Init;
architecture Init of Init is
--start of function
--impure to see CLK and RESET
impure function ReadByteEeprom (address : integer range 0 to 255) return
std_logic_vector is
variable BitCount:std_logic_vector(7 downto 0);
variable PulseCount:integer:=0;
begin
if (reset='0') then
BitCount:="00000000";
PulseCount:=0;
LOWCS<='1'; --** --haven't written any serial stuff yet.
elsif(CLK'event and CLK='1') then
LOWCS<='0'; --**
if(PulseCount=3)then
BitCount:="11110001";
elsif (address<=34)then
BitCount:="01010101";
end if;
PulseCount:=PulseCount+1;
end if;
return BitCount;
end;
--end of function
begin
LOWWP<='1'; -- allow writes
LOWHOLD<='1';
process (reset,firstblock_verified,CLK)
begin
if (reset='0') then --asynchronous RESET active low
LOWCS<='1'; --disable chip
init_verified<='0';
elsif(CLK'event and CLK='1') then
if( firstblock_verified='1')then
Red<=ReadByteEeprom(12);
--read constant array
init_verified<='1';
end if;
end if;
end process;
end Init;