Function Laplace in "if" statement

[Ben]

Dear friends,

(Excuse my english, I'm French)
Can any one could help me. I would create an analog model with
different behaviour for each kind of simulation.

For an "ac" simulation I would use a Laplace function, so I write in the
analog block :

if (analysis("ac")) begin
V(out) <+ laplace_nd(.....);
end

but the parser give me an error : "Using analog operator 'laplace_nd'
inside a conditionalstatement with a constant condition is not yet
supported"

And I see in the Verilog-A LRM : The laplace transform filters can be
used inside an 'if' or 'case' construct only if the controlling
conditional expression consists entirely of literal numerical constants,
parameters, or the analysis function.

I can do this laplace calcul outside of the 'if' construct but I don't
like it.

What can I understand ?? and what can I do ??

I will be waiting for your reply

 

Ben wrote:

but the parser give me an error : "Using analog operator 'laplace_nd'

inside a conditionalstatement with a constant condition is not yet
supported"

This error implies that the code is legal, but the tool does not
support it.

And I see in the Verilog-A LRM : The laplace transform filters can be

used inside an 'if' or 'case' construct only if the controlling
conditional expression consists entirely of literal numerical
constants,
parameters, or the analysis function.

Since you used the analysis function, I assume that your code is legal.
However, if the simulator does not support it, there is nothing you
can do except ask your simulator vendor to add support for it.

I can do this laplace calcul outside of the 'if' construct but I
don't
like it.

What can I do?

You could try using `ifdef and macro definitions. This would require
you to recompile the design with different macro definitions to use
the Laplace function call when you wanted to do ac analysis.

 

[Ben]

This is what I understood :

I used a macro :
`define Enplace(expr,n,d) (laplace_nd( expr, num, den ));

and I call it in my if statement :
if ( analysis("ac") ) begin
V(out) <+ `Enplace( expr , num, den );
end

But the parser give me the same error!!! Can I do something else?
Does the simulation takes much more time if I write
x=laplace_nd(expr,n,d) outside the if(analysis("ac")) block for an
analysis tran??? I need to simulate 10000 model like this in parrallele

thx

ben

 

Ben wrote:

I used a macro :
`define Enplace(expr,n,d) (laplace_nd( expr, num, den ));

and I call it in my if statement :
if ( analysis("ac") ) begin
V(out) <+ `Enplace( expr , num, den );
end

But the parser give me the same error!!! Can I do something else?

Of course it does. After the macro is expanded, you have the
same code that produced the error the first time. This does
not help. What I am suggesting is to replace the if(analysis("ac"))
with conditional compilation:

`ifdef do_ac
V(out) <+ laplace_nd(expr, num, den);
`endif

But then if you want to do ac analysis, you cannot just change
to ac analysis. You will also have to recompile the design after
defining the macro do_ac. This is less convenient than just
changing the type of analysis. I am sure that is why the LRM
allows you to conditionally check the type of analysis, but your
tool does not support that so you have to find another way.

Does the simulation takes much more time if I write
x=laplace_nd(expr,n,d) outside the if(analysis("ac")) block for an
analysis tran??? I need to simulate 10000 model like this in
parrallele

I don't know anything about Verilog-A and how it executes, so I
cannot comment on simulation efficiency.

 

[Prasanna]

Hi Ben,

Yes, doing

if (analysis("ac")) begin
V(out) <+ laplace_nd(.....);
end

is perfectly valid. However, since your simulator doesnot support it,
the only workaround is to do what Steven Sharp suggested, wrap the
contribution statement in a `ifdef `endif block.

However, if the simulator does not support it, there is nothing you
can do except ask your simulator vendor to add support for it.

Ben, I guess you are running Cadence Spectre..I tried a small similar
example on Spectre/AMS designer, I get the exact same error message
(verbatim), so ask Cadence to implement it ;-)

Does the simulation takes much more time if I write
x=laplace_nd(expr,n,d) outside the if(analysis("ac")) block for an
analysis tran??? I need to simulate 10000 model like this in
parrallele

Yes, it will degrade the performance because the simulator ends up
solving the x=laplace_nd(expr,n,d) unnecessarily every iteration of
every timepoint in every instance of that module ! Especially since you
mention 10000s of instances. If you are concerned about performance,
the `ifdef workaround has an added advantage in that it gets rid of the
if(analysis("ac")) check too because if(analysis("ac")) always results
in false for tran analysis anyway..

Cheers,
Prasanna