Frequency-power relationship of circuits

[Ben Weaver]

Hi all...
Can someone help me? Physicsy question I'm not too sure about:

If you've got a circuit, for example a microprocessor, running at one
clock frequency and all of a sudden you double the clock frequency -
you'd expect the power consumption of the device to go up.

Question one (reality check): Is this indeed the case?

Question two: How much would you expect the power consumption to go up?
Double? Is there a simple relationship? Is it linear?

Question three: It has been suggested to me that this only applies for
CMOS devices and bipolar devices have no frequency-power dependance. Any
thoughts?

Can anyone offer a quick explanation to set me straight on this?

Cheers

Ben
~~~

 

[Roy McCammon]

Ben Weaver wrote:

Hi all...
Can someone help me? Physicsy question I'm not too sure about:

If you've got a circuit, for example a microprocessor, running at one
clock frequency and all of a sudden you double the clock frequency -
you'd expect the power consumption of the device to go up.

Question one (reality check): Is this indeed the case?

yes

Question two: How much would you expect the power consumption to go up?
Double? Is there a simple relationship? Is it linear?

approximately yes. You can think of each clock transition
as dissipating a fixed amount of energy.

Question three: It has been suggested to me that this only applies for
CMOS devices and bipolar devices have no frequency-power dependance. Any
thoughts?

Bipolar also has a frequency dependence, but it also
has a large zero frequency bias. Mathematically
you might call it affine (linear plus a constant).



--
local optimization seldom leads to global optimization

my e-mail address is: rb <my last name> AT ieee DOT org

 

[Keith R. Williams]

In article <3F73213E.1070503@REMOVETHISyork.ac.uk>, bjw105
@REMOVETHISyork.ac.uk says...

Hi all...
Can someone help me? Physicsy question I'm not too sure about:

If you've got a circuit, for example a microprocessor, running at one
clock frequency and all of a sudden you double the clock frequency -
you'd expect the power consumption of the device to go up.

Yes. CMOS dynamic power is proportional to the clock frequency.

Question one (reality check): Is this indeed the case?

Yes.

Question two: How much would you expect the power consumption to go up?
Double? Is there a simple relationship? Is it linear?

First, there are two components of power. Dynamic power (switching
power) is dissipated by changes in state. Dynamic power is goes pretty
much along the classical P~FV^2 relationship. The more changes in state
per unit time (Frequency) the higher the power. Static power is the
power dissipated with no state changes and is proportional to V^2
(sorta, see below).

Older true CMOS processes have very little static power dissipation so
the power dissipated in an older processor goes pretty much along the
FV^2 dynamic power formula. However, newer processes have a lot of
leakage, so static power becomes significant. Thus the linear
relationship doesn't hold (unless you subtract off the static power).

Question three: It has been suggested to me that this only applies for
CMOS devices and bipolar devices have no frequency-power dependance. Any
thoughts?

Certainly there is a frequency/power relationship in bipolar devices as
well. The difference is that a bipolar device has a far higher static
power so it'll tend to mask the change in the dynamic power. Advanced
CMOS processes have high static power consumption (leakage is getting
to be a big problem) so the relationship is getting more complicated.

Can anyone offer a quick explanation to set me straight on this?

I hope that was quick enough. ;-)

--
Keith

 

[Ben Weaver]

That's great. Very interesting.

Thanks Keith and Roy.

Ben
~~~

Keith R. Williams wrote:

In article <3F73213E.1070503@REMOVETHISyork.ac.uk>, bjw105
@REMOVETHISyork.ac.uk says...

Hi all...
Can someone help me? Physicsy question I'm not too sure about:

If you've got a circuit, for example a microprocessor, running at one
clock frequency and all of a sudden you double the clock frequency -
you'd expect the power consumption of the device to go up.


Yes. CMOS dynamic power is proportional to the clock frequency.


Question one (reality check): Is this indeed the case?


Yes.


Question two: How much would you expect the power consumption to go up?
Double? Is there a simple relationship? Is it linear?


First, there are two components of power. Dynamic power (switching
power) is dissipated by changes in state. Dynamic power is goes pretty
much along the classical P~FV^2 relationship. The more changes in state
per unit time (Frequency) the higher the power. Static power is the
power dissipated with no state changes and is proportional to V^2
(sorta, see below).

Older true CMOS processes have very little static power dissipation so
the power dissipated in an older processor goes pretty much along the
FV^2 dynamic power formula. However, newer processes have a lot of
leakage, so static power becomes significant. Thus the linear
relationship doesn't hold (unless you subtract off the static power).


Question three: It has been suggested to me that this only applies for
CMOS devices and bipolar devices have no frequency-power dependance. Any
thoughts?


Certainly there is a frequency/power relationship in bipolar devices as
well. The difference is that a bipolar device has a far higher static
power so it'll tend to mask the change in the dynamic power. Advanced
CMOS processes have high static power consumption (leakage is getting
to be a big problem) so the relationship is getting more complicated.


Can anyone offer a quick explanation to set me straight on this?


I hope that was quick enough. ;-)