Frequency generation

[YesMann]

Hello,

I have FClk in <= 12Mhz and I want to generate two derivate frequency

F1 = FClkin/7 (=1.714Mhz) and F2 =F1/5 (= 342.8KHz)

Can anyone help me to write this code in vhdl?

Thanks in advance,

 

[Charles M. Elias]

"YesMann" <ddancul@hotmail.com> wrote in message news:<3f2d5c89$1@news.swissonline.ch>...

Hello,

I have FClk in <= 12Mhz and I want to generate two derivate frequency

F1 = FClkin/7 (=1.714Mhz) and F2 =F1/5 (= 342.8KHz)

Can anyone help me to write this code in vhdl?

Thanks in advance,

Look for comp.lang.vhdl FAQ Part 1 on this site. In part 1 (4.2.30)
you will find how to code a clock divider. I have used a variation of
this divider and it works well. It is a good idea to download FAQ and
use it for a reference. I have learned a lot from it.

Best regards,

Charles