FPGA simplest processor

Guest
http://mymicroprocessor.blogspot.com/2018/08/fpga-simplest-processor.html

Go to my blog for more information.
 
On Thu, 9 Aug 2018 15:28:57 -0700 (PDT)
othmana@gmail.com wrote:

http://mymicroprocessor.blogspot.com/2018/08/fpga-simplest-processor.html

Go to my blog for more information.

I couldn't quickly fine a simple architecture description, only
the Java emulation tool.

Jan Coombs
 
On 09/08/2018 23:28, othmana@gmail.com wrote:
http://mymicroprocessor.blogspot.com/2018/08/fpga-simplest-processor.html

Go to my blog for more information.

Why not make it easy for us and just give us the UK patent reference here.

MK
 
On Saturday, August 11, 2018 at 12:18:27 PM UTC-4, Michael Kellett wrote:
On 09/08/2018 23:28, othmana@gmail.com wrote:
http://mymicroprocessor.blogspot.com/2018/08/fpga-simplest-processor.html

Go to my blog for more information.

Why not make it easy for us and just give us the UK patent reference here..

What is easy about reading patents?

The US transmits a time code signal from Colorado which isn't always receivable on the east coast. Some 10 years ago (or so) they modified the signal to include phase modulation which should be easier to receive. The only trouble is a company (who may have worked with the US government) got a patent for a receiver of this phase modulated signal. I can't be sure of what I'm reading in the patent, so I can't try to design around it and sell a phase demodulated receiver. If they were easy to read, I would know just what had been patented and would be able to design a non-infringing receiver.

Rick C.
 
On Sunday, 12 August 2018 00:18:27 UTC+8, Michael Kellett wrote:
On 09/08/2018 23:28, othmana@gmail.com wrote:
http://mymicroprocessor.blogspot.com/2018/08/fpga-simplest-processor.html

Go to my blog for more information.

Why not make it easy for us and just give us the UK patent reference here.

MK

http://mymicroprocessor.blogspot.com/2018/08/simplest-processor-patent-application.html
 
On Monday, August 13, 2018 at 7:10:14 AM UTC-4, oth...@gmail.com wrote:
On Sunday, 12 August 2018 00:18:27 UTC+8, Michael Kellett wrote:
On 09/08/2018 23:28, othmana@gmail.com wrote:
http://mymicroprocessor.blogspot.com/2018/08/fpga-simplest-processor.html

Go to my blog for more information.

Why not make it easy for us and just give us the UK patent reference here.

MK

http://mymicroprocessor.blogspot.com/2018/08/simplest-processor-patent-application.html

Ok, I looked at it a bit. Is there something special about this particular design? What were your goals in designing it? What aspects of this design excel in small CPUs?

Rick C.
 
On Thursday, 16 August 2018 04:03:15 UTC+8, gnuarm.del...@gmail.com wrote:
On Monday, August 13, 2018 at 7:10:14 AM UTC-4, oth...@gmail.com wrote:
On Sunday, 12 August 2018 00:18:27 UTC+8, Michael Kellett wrote:
On 09/08/2018 23:28, othmana@gmail.com wrote:
http://mymicroprocessor.blogspot.com/2018/08/fpga-simplest-processor.html

Go to my blog for more information.

Why not make it easy for us and just give us the UK patent reference here.

MK

http://mymicroprocessor.blogspot.com/2018/08/simplest-processor-patent-application.html

Ok, I looked at it a bit. Is there something special about this particular design? What were your goals in designing it? What aspects of this design excel in small CPUs?

Rick C.

decoding logic is simplest. Only 16 instructions but unlimited number of operators. CPU sim cannot handle this cpu. I need to pretend a few instructions correspond to some operators.

You can start with one operator. Immediate data is all used up for the literal or constant.

If you need more operators, allocate some bits in the immediate data field.

It is the simplest because the 3 opcode bits out of 4, directly control the mux in the data path.

The jump bit, need to share with zero detector in order to provide conditional jump.

call return instructions are provided so make the decoding somewhat complicated but not by much. In many cases they are not required. For example, the Lagged Fibonacci Random number generator does not need a call and therefore return instruction.

I have 2 reserve instructions but committing them to work will need more complicated decoding logic, which may not be justified.

E.g. in one reserve instrucion, I wanted to implement a NOP. It is implemented by decoding its 4 bit pattern, and then use it to disable register and memory write. Just these two functions already crashed my Quartus. Still trying to debug them. Imagine, just by adding 2 2-bit and gates, can crash Quartus FPGA CAD.

Maybe, it is better not to implement the NOP instruction. We should find other alternatives, such as duplicating instructions.
 
On 11/08/2018 20:21, gnuarm.deletethisbit@gmail.com wrote:
On Saturday, August 11, 2018 at 12:18:27 PM UTC-4, Michael Kellett wrote:
On 09/08/2018 23:28, othmana@gmail.com wrote:
http://mymicroprocessor.blogspot.com/2018/08/fpga-simplest-processor.html

Go to my blog for more information.

Why not make it easy for us and just give us the UK patent reference here.

What is easy about reading patents?

The US transmits a time code signal from Colorado which isn't always receivable on the east coast. Some 10 years ago (or so) they modified the signal to include phase modulation which should be easier to receive. The only trouble is a company (who may have worked with the US government) got a patent for a receiver of this phase modulated signal. I can't be sure of what I'm reading in the patent, so I can't try to design around it and sell a phase demodulated receiver. If they were easy to read, I would know just what had been patented and would be able to design a non-infringing receiver.

Rick C.
Some patents are more readable than others. This is an especially chatty
and helpful one. I get the feeling that UK patent style is tending more
towards sensible descriptions but that may just be a reflection of the
ones I've happened to look at.

MK
 

Welcome to EDABoard.com

Sponsor

Back
Top