FPGA programming issue with Xilinx POD and PROM

[Krishna Kumar]

Hi everyone
I am having a strange problem with programming Xilinx XC2s200 FG 256.
Following is a brief description:

1) I am able to download .bit file to the FPGA using slave serial
mode. The code is primarily a DMA state machine which is responsible
for transfering date from peripherals to DSP and vice versa. We have a
diagnostic DMA test in place which tells the user about incorrect
accesses. The DMA test in this case works impeccably- no errors even
after running overnight.

2) We also need the same system in a standalone mode and hence we need
a PROM device to store the configuration file for the FPGA. So I
convert the .bit file to .mcs file using Xilinx 6.2i. The PROM that we
use is XC17s200A one time programmable PROM. The FPGA gets programmed
in master serial mode in this case. The same DMA test runs fine for
the first 3 or 4 mins and then starts reporting errors.

I am not sure why. Is there any difference between the 2 methods that
could cause this error. We also thought of the possibility of
bitstream getting corrupted when getting converted to .mcs file.But we
have not faced this problem before. The line between the PROM and FPGA
is a serial bit stream.The circuitry of from the PROM matches exactly
as what is specified in the datasheets- including a 3.3 K pull
resistor for the ~INIT line .

Has anybody seen a problem like this before? Please let me know

thanks
Krishna Kumar
DSP system Engineer
Signalogic Inc
Dallas TX