FPGA and Package-on-Package

[acd]

Since the Beagleboard and the Raspberry Pi use Package-on-Packge for integrating Flash and DRAM with the processor SoC I wonder why the FPGA vendors do not offer this. There are many FPGA-designs that need external memory and the pins to the base PCB are valuable resource.

Not even Silicon Blue (now lattice) who targeted the mobile market offered it, as far as I could find.
Even though, the offered memories for PoP are limited, every new product that integrates with them would expand that spectrum.
With the new FPGA-SoCs (Xilinx ZYNC, Altera "SoC FPGA") the issue might change.

Andreas

 

On Saturday, May 5, 2012 1:40:44 AM UTC+12, acd wrote:

Since the Beagleboard and the Raspberry Pi use Package-on-Packge for integrating Flash and DRAM with the processor SoC I wonder why the FPGA vendors do not offer this. There are many FPGA-designs that need external memory and the pins to the base PCB are valuable resource.

Not even Silicon Blue (now lattice) who targeted the mobile market offered it, as far as I could find.
Even though, the offered memories for PoP are limited, every new product that integrates with them would expand that spectrum.
With the new FPGA-SoCs (Xilinx ZYNC, Altera "SoC FPGA") the issue might change.

Andreas

Xilinx has dropped some hints on this, but I think the bigger issue, is the FPGA is FAR LESS price sensitive, and MORE performance sensitive, than the products that use Stacked-Die.

So, the top end FPGA's simply add more on chip RAM, and sell you a bigger part!!

You are quite right tho, that there is an opening for a smaller FPGA, or larger CPLD, tightly coupled to RAM.

Even here, the issue is volume, as the really big players like Broadcom, can get good enough performance from their Stacked approach, to tackle 98% of the high volume markets - that leaves the crumbs for the PLD vendor.