Force in Verilog (Icarus)

[Kenneth Brun Nielsen]

I'm trying to make a FORCE statement work in Icarus, but it gives me
headache instead.

I want to force a value to a node deep into a hierarchy. The force
statement works on the value itself, but it has no effect on
subsequent calculations. E.g. if I force the input of a simple gate
somewhere in the hierarchy, I would expect its output to change value
to satisfy whatever input->output relation that might exist.

I made the following code for a simple example:
---
`timescale 1ns / 1ns

module FD_TOP();
reg topa,topb;
wire topc,topd;

initial
begin
force DUT.a = 1'b1;
#100;
release DUT.a;
end

initial
begin
$dumpfile("debug.vcd");
$dumpvars;
topa=0;
topb=0;
end

hierBlock DUT(topa,topb,topc,topd);


endmodule

module hierBlock(a,b,c,d);
input a,b;
output c,d;

INV forced (c,a);
INV unforced (d,b);

initial
begin
#40 $display("%b",{a,b,c,d});
#40 $display("%b",{a,b,c,d});
#40 $display("%b",{a,b,c,d});
$finish;
end

endmodule // hierBlock

module INV (Z, A);

output Z;
input A;

assign Z = ~A;

endmodule // IVLL
---

The code models a top block instantiating a hierarchical block (named
hierBlock), which consist of two inverters. From the top-level I use a
FORCE statement to manipulate the value of the 'a' node inside
hierBlock. This node 'a' is the input to one of the inverters and I
would expect the output of this inverter to be the inversion of the
forced value.

However, the output is not what I expect. I get the following
simulation in Icarus 0.9.5:
---
1011
1011
0011
---

Is it a bug in the simulator, or are my expectations to the behaviour
wrong? Any idea to achieve the behaviour I want?

Best regards,
Kenneth

 

[Uwe Bonnes]

Kenneth Brun Nielsen <kenneth.brun.nielsen@gmail.com> wrote:

I'm trying to make a FORCE statement work in Icarus, but it gives me
headache instead.

I want to force a value to a node deep into a hierarchy. The force
statement works on the value itself, but it has no effect on
subsequent calculations. E.g. if I force the input of a simple gate
somewhere in the hierarchy, I would expect its output to change value
to satisfy whatever input->output relation that might exist.

On the iverilog-devel@lists.sourceforge.net Mailinglist chances are high to
get feedback from the developpers.

Bye

--
Uwe Bonnes bon@elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------

 

[Cary R.]

This is a known limitation in the V0.9 branch of Icarus Verilog and has
been fixed in the current development version. The change is too
complicated to back port to V0.9. Use either the latest code from git or
the most recent snapshot to get code that fixes this problem.

Cary

On 2/26/2012 3:57 PM, Kenneth Brun Nielsen wrote:

I'm trying to make a FORCE statement work in Icarus, but it gives me
headache instead.

I want to force a value to a node deep into a hierarchy. The force
statement works on the value itself, but it has no effect on
subsequent calculations. E.g. if I force the input of a simple gate
somewhere in the hierarchy, I would expect its output to change value
to satisfy whatever input->output relation that might exist.