Floating Point Powers and Logs?

[Mike Delaney]

Does anyone have any suggestions on how to do Logs and Powers?
Part of the design I'm working on has "log(1 + B^d)", and we're pretty
much stuck there.
So far, the ideas being kicked around are to either use the Taylor
series (I'm not the biggest fan of this), or to try to use CORDIC.
I haven't found any free/open IP that looked like it would work, the
closest being a couple of (fixed-point) CORDIC cores from Open Cores.
Accuracy and speed are the two main concerns, but memory is tight, so
I don't know if a lookup table is doable. Are there any other
approximations that might work, and might be easier to implement using
floating point? And how do the hardware implementations in some FPU's
work?

Thanks,
Mike

 

[David Bishop]

Mike Delaney wrote:

I've already implemented these for the VHDL-200x.
http://www.eda.org/vhdl-200x/vhdl-200x-ft/files.html
Take a look at "fphdl_base_alg_pkg.vhd", in floating point.

You will also find synthesizable fixed and floating point packages
here. Please give them a try, we need more people pounding on
this code.

These series are debugged and working, but not optimized, which is
why they are not being made part of the standard.

Does anyone have any suggestions on how to do Logs and Powers?
Part of the design I'm working on has "log(1 + B^d)", and we're pretty
much stuck there.
So far, the ideas being kicked around are to either use the Taylor
series (I'm not the biggest fan of this), or to try to use CORDIC.
I haven't found any free/open IP that looked like it would work, the
closest being a couple of (fixed-point) CORDIC cores from Open Cores.
Accuracy and speed are the two main concerns, but memory is tight, so
I don't know if a lookup table is doable. Are there any other
approximations that might work, and might be easier to implement using
floating point? And how do the hardware implementations in some FPU's
work?

Thanks,
Mike