Flip-flop power on state question.

[Rubicon]

Hello,

To define a flip-flops state when initial power is applied would you
have both sides of the flip-flops CLR and PRE pins tied to V+.?

The flip-flop is:
SN54HC74, SN74HC74 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH
CLEAR AND PRESET

Cheers,

Andrew.

Remove the ZZ from E-Mail address to contact me.

 

[Peter Bennett]

On Tue, 09 Sep 2003 11:07:47 GMT, zzRubicon@netaccess.co.nz (Rubicon)
wrote:

Hello,

To define a flip-flops state when initial power is applied would you
have both sides of the flip-flops CLR and PRE pins tied to V+.?

The flip-flop is:
SN54HC74, SN74HC74 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH
CLEAR AND PRESET

No.

The CLR and PRE inputs are active low. You need to hold one of them
low for a short period after power is applied toplace the FF in a
particular state. (If you want the FF to be set, hold the PRE input
low).




--
Peter Bennett VE7CEI
GPS and NMEA info and programs: http://vancouver-webpages.com/peter/index.html
Newsgroup new user info: http://vancouver-webpages.com/nnq

 

[Frank Pickens]

Tie both SET and CLEAR high through a resistor (2.2k -3.3k) then tie a
capacitor from either SET or CLEAR to ground on the order of .1 uF. When
power is applied the desired pin is briefly pulled to ground while the
capacitor charges. It's worked for me.
Good luck,
Frank


Rubicon wrote:

Hello,

To define a flip-flops state when initial power is applied would you
have both sides of the flip-flops CLR and PRE pins tied to V+.?

The flip-flop is:
SN54HC74, SN74HC74 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH
CLEAR AND PRESET

Cheers,

Andrew.

Remove the ZZ from E-Mail address to contact me.

 

[Rubicon]

Thankyou for your replies.

Andrew.



On Tue, 09 Sep 2003 18:35:18 GMT, Frank Pickens
<frankpickens@verizon.net> wrote:

Tie both SET and CLEAR high through a resistor (2.2k -3.3k) then tie a
capacitor from either SET or CLEAR to ground on the order of .1 uF. When
power is applied the desired pin is briefly pulled to ground while the
capacitor charges. It's worked for me.
Good luck,
Frank


Rubicon wrote:

Hello,

To define a flip-flops state when initial power is applied would you
have both sides of the flip-flops CLR and PRE pins tied to V+.?

The flip-flop is:
SN54HC74, SN74HC74 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH
CLEAR AND PRESET

Cheers,

Andrew.

Remove the ZZ from E-Mail address to contact me.

Remove the ZZ from E-Mail address to contact me.