Flat Verilog netlist - out

R

Rajeswaran M

Guest
Is there a way to get flatten verilog netlist from a top level
schematic, which has multiple hierarhies.
 
Rajeswaran M <m_rajeswaran@yahoo.com> wrote in message news:<cfcsff$f9e$1@home.itg.ti.com>...
Is there a way to get flatten verilog netlist from a top level
schematic, which has multiple hierarhies.
Yes (do a search as it's been discussed before).
 

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