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Guest
hi all:
when i finish this , i got a problem like
"Unsupported feature error: non locally static bounds are not
supported"
my code is
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;

entity ram is
generic ( k: integer :=8;
w: integer :=4);
port ( rd, wr, cs : in std_logic;
adr: in std_logic_vector(w-1 downto 0);
din: in std_logic_vector(k-1 downto 0);
dout:eek:ut std_logic_vector(k-1 downto 0));
end ram;

architecture behav of ram is
--constant a : integer := 4;
subtype word is std_logic_vector(k-1 downto 0);
type memory is array (0 to 2 ** w-1) of word;
signal sram : memory;
signal adr_in : integer;
begin
adr_in <= conv_integer(adr);

write : process (wr, cs, adr_in, din, rd)
begin
if wr = '0' then
if cs = '0' and rd = '1' then sram(adr_in) <= din;
end if;
end if;
end process;

read : process(rd, cs, adr_in, wr)
begin
if(rd = '0' and cs = '0' and wr = '1') then dout <= sram(adr_in);
else dout <= "ZZZZZZZZ";
end if;
end process;
end behav;
 
ariesxyg@yahoo.com.cn wrote:

when i finish this , i got a problem like
"Unsupported feature error: non locally static bounds are not
supported"
It would be helpful to provide the exact error message, that name of the
tool, that reported it and the pointer to the source code line, where
the error message points to (the line number).

Ralf
 
the error is the line
"type memory is array (0 to 2 ** w-1) of word;"
i use max+pluse2, and the device is altera flex10k.
 
ariesxyg@yahoo.com.cn wrote:

the error is the line
"type memory is array (0 to 2 ** w-1) of word;"
Hmm ... strange.

i use max+pluse2, and the device is altera flex10k.
With MaxPlus+ I had some trouble during the last weeks. (This crappy
thing does not even know std_ulogic!)

What happens, if you define the array bounds with fixed values? I guess,
that the tool may no see, that the generic parameters are locally static.
If this "solves" the problem use your actual design, try to synthesize
and define the values of the generic parameters externally. - Let the
tool "override" the values of the parameters.

Ralf
 
ariesxyg@yahoo.com.cn wrote:

i use max+pluse2, and the device is altera flex10k.

MAXplus2 is obsolete and unusable for vhdl synthesis.
Try the free version of quartus here.
http://www.altera.com/products/software/products/quartus2web/sof-quarwebmain.html

-- Mike Treseler
 

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