Fet switch spikes.

G

George Herold

Guest
I'm switching a high impedance (~100 k ohm) with a fet.

I wanted to make a dummy signal of a
photoconductive detector. The detector resistance is about
10 Meg ohms and changes by ~ 1%.
Here's the circuit I built.

V bias ~1-2V-----------+
|
R bias (10 Meg)
|
+---------------> signal out
|
R sig (10 Meg)
|
+-D---+
G | |
+----+ | | R-100k
____| |___>--+ | |
V gate 0-7 V. +-S-+-+--------------> signal out
|
Gnd

Fet was a 2N7000. When I switched it off, (gate to ground) I got
this huge negative going spike. (Between drain and source)
I assume this was just capacitance
(Gate to source or drain?) and the large dV/dt.

I ended up driving it with a sine wave, which gave an ugly
"dummy" signal, but no spikes. Is there a better way to cure this?
A bunch of resistance in the gate lead?
I tried adding a diode S-D, but this didn't do much... of course this
is just in parallel with the FET body diode... (I figured that out after.)

George H.
 
On Monday, June 8, 2015 at 10:07:40 AM UTC-4, Phil Hobbs wrote:
On 6/8/2015 10:03 AM, George Herold wrote:
I'm switching a high impedance (~100 k ohm) with a fet.

I wanted to make a dummy signal of a
photoconductive detector. The detector resistance is about
10 Meg ohms and changes by ~ 1%.
Here's the circuit I built.

V bias ~1-2V-----------+
|
R bias (10 Meg)
|
+---------------> signal out
|
R sig (10 Meg)
|
+-D---+
G | |
+----+ | | R-100k
____| |___>--+ | |
V gate 0-7 V. +-S-+-+--------------> signal out
|
Gnd

Fet was a 2N7000. When I switched it off, (gate to ground) I got
this huge negative going spike. (Between drain and source)
I assume this was just capacitance
(Gate to source or drain?) and the large dV/dt.

I ended up driving it with a sine wave, which gave an ugly
"dummy" signal, but no spikes. Is there a better way to cure this?
A bunch of resistance in the gate lead?
I tried adding a diode S-D, but this didn't do much... of course this
is just in parallel with the FET body diode... (I figured that out after.)

George H.

Use an ATF55143.
Click to expand...

Are you serious? Are these low C?
I'm only switching at 100 Hz to a few kHz.

The spec sheet has S parameters.. OK I found the C
0.14 pF Cgd, 0.6 pf Cgs,

I'm not sure that is qualified to work near DC. :^)

(I was thinking I'd like a function generator were
I could slow down the edges.)
(A triangle wave into a clipping network?)

George H.


Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510

hobbs at electrooptical dot net
http://electrooptical.net
Click to expand...
 
On 6/8/2015 10:03 AM, George Herold wrote:
I'm switching a high impedance (~100 k ohm) with a fet.

I wanted to make a dummy signal of a
photoconductive detector. The detector resistance is about
10 Meg ohms and changes by ~ 1%.
Here's the circuit I built.

V bias ~1-2V-----------+
|
R bias (10 Meg)
|
+---------------> signal out
|
R sig (10 Meg)
|
+-D---+
G | |
+----+ | | R-100k
____| |___>--+ | |
V gate 0-7 V. +-S-+-+--------------> signal out
|
Gnd

Fet was a 2N7000. When I switched it off, (gate to ground) I got
this huge negative going spike. (Between drain and source)
I assume this was just capacitance
(Gate to source or drain?) and the large dV/dt.

I ended up driving it with a sine wave, which gave an ugly
"dummy" signal, but no spikes. Is there a better way to cure this?
A bunch of resistance in the gate lead?
I tried adding a diode S-D, but this didn't do much... of course this
is just in parallel with the FET body diode... (I figured that out after.)

George H.

Use an ATF55143.
Click to expand...

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510

hobbs at electrooptical dot net
http://electrooptical.net
 
On 6/8/2015 10:23 AM, George Herold wrote:
On Monday, June 8, 2015 at 10:07:40 AM UTC-4, Phil Hobbs wrote:
On 6/8/2015 10:03 AM, George Herold wrote:
I'm switching a high impedance (~100 k ohm) with a fet.

I wanted to make a dummy signal of a
photoconductive detector. The detector resistance is about
10 Meg ohms and changes by ~ 1%.
Here's the circuit I built.

V bias ~1-2V-----------+
|
R bias (10 Meg)
|
+---------------> signal out
|
R sig (10 Meg)
|
+-D---+
G | |
+----+ | | R-100k
____| |___>--+ | |
V gate 0-7 V. +-S-+-+--------------> signal out
|
Gnd

Fet was a 2N7000. When I switched it off, (gate to ground) I got
this huge negative going spike. (Between drain and source)
I assume this was just capacitance
(Gate to source or drain?) and the large dV/dt.

I ended up driving it with a sine wave, which gave an ugly
"dummy" signal, but no spikes. Is there a better way to cure this?
A bunch of resistance in the gate lead?
I tried adding a diode S-D, but this didn't do much... of course this
is just in parallel with the FET body diode... (I figured that out after.)

George H.

Use an ATF55143.

Are you serious? Are these low C?
I'm only switching at 100 Hz to a few kHz.

The spec sheet has S parameters.. OK I found the C
0.14 pF Cgd, 0.6 pf Cgs,

I'm not sure that is qualified to work near DC. :^)

(I was thinking I'd like a function generator were
I could slow down the edges.)
(A triangle wave into a clipping network?)

George H.
Click to expand...

They don't oscillate when they're fully on, or fully off. IIRC JL uses
a lot of NE3509s for that sort of job, but the 55143s are enhancement
mode, which makes them pretty close to a drop in replacement.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510

hobbs at electrooptical dot net
http://electrooptical.net
 
On Monday, June 8, 2015 at 6:58:05 PM UTC-4, John Larkin wrote:
On Mon, 8 Jun 2015 07:03:57 -0700 (PDT), George Herold
gherold@teachspin.com> wrote:

I'm switching a high impedance (~100 k ohm) with a fet.

I wanted to make a dummy signal of a
photoconductive detector. The detector resistance is about
10 Meg ohms and changes by ~ 1%.
Here's the circuit I built.

V bias ~1-2V-----------+
|
R bias (10 Meg)
|
+---------------> signal out
|
R sig (10 Meg)
|
|
+----+ |
____| |___>----------+

V gate 0-7 V. +-+--------------> signal out
|
Gnd




Why the fet? Can't you just poke the signal generator into the
circuit?
Head slap, Yeah that would work.
Click to expand...

There is some question, about how to drive the
delta R. (Currently the bias R is equal to the
signal R. I'm thinking a bigger bias R will give
almost twice the signal. Well we have to agree on what's
"constant" current or voltage.
> The 2N7000 has a lot of g-d capacitance.
Yeah.. and my 100k ohm resistor doesn't
drain it very fast.

Can I switch a relay at ~1 kHz?
(I guess I only need a good edge..
to measure the frequency response.)

George H.

--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com
Click to expand...
 
On Mon, 8 Jun 2015 07:03:57 -0700 (PDT), George Herold
<gherold@teachspin.com> wrote:

I'm switching a high impedance (~100 k ohm) with a fet.

I wanted to make a dummy signal of a
photoconductive detector. The detector resistance is about
10 Meg ohms and changes by ~ 1%.
Here's the circuit I built.

V bias ~1-2V-----------+
|
R bias (10 Meg)
|
+---------------> signal out
|
R sig (10 Meg)
|
|
+----+ |
____| |___>----------+

V gate 0-7 V. +-+--------------> signal out
|
Gnd
Click to expand...


Why the fet? Can't you just poke the signal generator into the
circuit?

The 2N7000 has a lot of g-d capacitance.


--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com
 
On Monday, June 8, 2015 at 10:18:00 PM UTC-4, George Herold wrote:
On Monday, June 8, 2015 at 6:58:05 PM UTC-4, John Larkin wrote:
On Mon, 8 Jun 2015 07:03:57 -0700 (PDT), George Herold
gherold@teachspin.com> wrote:

I'm switching a high impedance (~100 k ohm) with a fet.

I wanted to make a dummy signal of a
photoconductive detector. The detector resistance is about
10 Meg ohms and changes by ~ 1%.
Here's the circuit I built.

V bias ~1-2V-----------+
|
R bias (10 Meg)
|
+---------------> signal out
|
R sig (10 Meg)
|
|
+----+ |
____| |___>----------+

V gate 0-7 V. +-+--------------> signal out
|
Gnd




Why the fet? Can't you just poke the signal generator into the
circuit?
Head slap, Yeah that would work.

There is some question, about how to drive the
delta R. (Currently the bias R is equal to the
signal R. I'm thinking a bigger bias R will give
almost twice the signal. Well we have to agree on what's
"constant" current or voltage.
The 2N7000 has a lot of g-d capacitance.
Yeah.. and my 100k ohm resistor doesn't
drain it very fast.

Can I switch a relay at ~1 kHz?
(I guess I only need a good edge..
to measure the frequency response.)

George H.



--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com
Click to expand...

Hi guys (and any gals) OK I officially don't understand Fet's now.
I was playing around with the above circuit. (switching 100 k ohm in and out.)
(Except I replaced the two 10 Meg's with 1 Meg to give me more signal on the 'scope.)

Here are some 'scope shots made with our new TEK1052B. (Images are jpeg's
'cause the bmp's were ~1 Meg byte each and took to long to write the the thumb
drive.)

https://www.dropbox.com/sh/ajth8kdqvasnb66/AAAhFmd98y93uZjhjxfJfLH4a?dl=0

Chan 1. is the drive (gate) and chan 2. the signal across the 100 k R.

I've mostly been looking at the signal where the fet is turned off.
TEK000 is with 0-2 V of drive. (about the min. to turn the FET on.)

So I figured more drive voltage on the gate would give me a bigger spike.
(more charge .. C*V)
TEK001 is with 0-6.5 V.. spike is almost exactly the same!
Why is that? Charge injected is independent of the max gate voltage?
It's not a capacitor.. but something more complicated?

So then I raised the zero or "off" voltage.

TEK002 is for 1-3 V on the gate... better!
TEK003 is about the best.. ~1.5 - 3.0 V.

Tek004 is the input spike.. (much shorter) 0-3 V drive.
TEK005 is with 1.5V- 3V drive.. it helps the on spike too!

I thought this was an easy circuit (question) hence SEB.

George H.
 
On Wed, 10 Jun 2015 08:08:27 -0700 (PDT), George Herold
<gherold@teachspin.com> wrote:

On Monday, June 8, 2015 at 10:18:00 PM UTC-4, George Herold wrote:
On Monday, June 8, 2015 at 6:58:05 PM UTC-4, John Larkin wrote:
On Mon, 8 Jun 2015 07:03:57 -0700 (PDT), George Herold
gherold@teachspin.com> wrote:

I'm switching a high impedance (~100 k ohm) with a fet.

I wanted to make a dummy signal of a
photoconductive detector. The detector resistance is about
10 Meg ohms and changes by ~ 1%.
Here's the circuit I built.

V bias ~1-2V-----------+
|
R bias (10 Meg)
|
+---------------> signal out
|
R sig (10 Meg)
|
|
+----+ |
____| |___>----------+

V gate 0-7 V. +-+--------------> signal out
|
Gnd




Why the fet? Can't you just poke the signal generator into the
circuit?
Head slap, Yeah that would work.

There is some question, about how to drive the
delta R. (Currently the bias R is equal to the
signal R. I'm thinking a bigger bias R will give
almost twice the signal. Well we have to agree on what's
"constant" current or voltage.
The 2N7000 has a lot of g-d capacitance.
Yeah.. and my 100k ohm resistor doesn't
drain it very fast.

Can I switch a relay at ~1 kHz?
(I guess I only need a good edge..
to measure the frequency response.)

George H.



--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

Hi guys (and any gals) OK I officially don't understand Fet's now.
I was playing around with the above circuit. (switching 100 k ohm in and out.)
(Except I replaced the two 10 Meg's with 1 Meg to give me more signal on the 'scope.)

Here are some 'scope shots made with our new TEK1052B. (Images are jpeg's
'cause the bmp's were ~1 Meg byte each and took to long to write the the thumb
drive.)

https://www.dropbox.com/sh/ajth8kdqvasnb66/AAAhFmd98y93uZjhjxfJfLH4a?dl=0

Chan 1. is the drive (gate) and chan 2. the signal across the 100 k R.

I've mostly been looking at the signal where the fet is turned off.
TEK000 is with 0-2 V of drive. (about the min. to turn the FET on.)

So I figured more drive voltage on the gate would give me a bigger spike.
(more charge .. C*V)
TEK001 is with 0-6.5 V.. spike is almost exactly the same!
Why is that? Charge injected is independent of the max gate voltage?
It's not a capacitor.. but something more complicated?
Click to expand...

There's a bunch of gate-drain capacitance, so when the channel is open
(ie, the fet is off), the drain voltage follows the gate drive
voltage, differentiated. But when the gate gets more positive than +2
or so, the d-s channel turns on and that shorts the drain to ground
pretty hard. The capacitive coupling from gate to drain is
non-inverting, but the fet gain is inverting.

There's also a substrate diode, namely a diode from source to drain.
It will limit the negative drain swing to -0.6 or so.

And all that happens at the same time!


--

John Larkin Highland Technology, Inc
picosecond timing laser drivers and controllers

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com
 
On Thursday, June 11, 2015 at 1:00:29 AM UTC-4, John Larkin wrote:
On Wed, 10 Jun 2015 08:08:27 -0700 (PDT), George Herold
gherold@teachspin.com> wrote:

On Monday, June 8, 2015 at 10:18:00 PM UTC-4, George Herold wrote:
On Monday, June 8, 2015 at 6:58:05 PM UTC-4, John Larkin wrote:
On Mon, 8 Jun 2015 07:03:57 -0700 (PDT), George Herold
gherold@teachspin.com> wrote:

I'm switching a high impedance (~100 k ohm) with a fet.

I wanted to make a dummy signal of a
photoconductive detector. The detector resistance is about
10 Meg ohms and changes by ~ 1%.
Here's the circuit I built.

V bias ~1-2V-----------+
|
R bias (10 Meg)
|
+---------------> signal out
|
R sig (10 Meg)
|
|
+----+ |
____| |___>----------+

V gate 0-7 V. +-+--------------> signal out
|
Gnd




Why the fet? Can't you just poke the signal generator into the
circuit?
Head slap, Yeah that would work.

There is some question, about how to drive the
delta R. (Currently the bias R is equal to the
signal R. I'm thinking a bigger bias R will give
almost twice the signal. Well we have to agree on what's
"constant" current or voltage.
The 2N7000 has a lot of g-d capacitance.
Yeah.. and my 100k ohm resistor doesn't
drain it very fast.

Can I switch a relay at ~1 kHz?
(I guess I only need a good edge..
to measure the frequency response.)

George H.



--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

Hi guys (and any gals) OK I officially don't understand Fet's now.
I was playing around with the above circuit. (switching 100 k ohm in and out.)
(Except I replaced the two 10 Meg's with 1 Meg to give me more signal on the 'scope.)

Here are some 'scope shots made with our new TEK1052B. (Images are jpeg's
'cause the bmp's were ~1 Meg byte each and took to long to write the the thumb
drive.)

https://www.dropbox.com/sh/ajth8kdqvasnb66/AAAhFmd98y93uZjhjxfJfLH4a?dl=0

Chan 1. is the drive (gate) and chan 2. the signal across the 100 k R.

I've mostly been looking at the signal where the fet is turned off.
TEK000 is with 0-2 V of drive. (about the min. to turn the FET on.)

So I figured more drive voltage on the gate would give me a bigger spike.
(more charge .. C*V)
TEK001 is with 0-6.5 V.. spike is almost exactly the same!
Why is that? Charge injected is independent of the max gate voltage?
It's not a capacitor.. but something more complicated?


There's a bunch of gate-drain capacitance, so when the channel is open
(ie, the fet is off), the drain voltage follows the gate drive
voltage, differentiated. But when the gate gets more positive than +2
or so, the d-s channel turns on and that shorts the drain to ground
pretty hard. The capacitive coupling from gate to drain is
non-inverting, but the fet gain is inverting.

There's also a substrate diode, namely a diode from source to drain.
It will limit the negative drain swing to -0.6 or so.

And all that happens at the same time!
Click to expand...
OK, thanks.
(The following is mostly for me.. you are the
intelligent audience, but you don't have to read or respond.
It's enough that I think someone intelligent is reading)

So I'm thinking it's mostly the gate drain C.
It doesn't depend on the size of the gate voltage because
it's only when the channel cuts off (at ~2V) that the capacitance matters.
But it does depend on the gate voltage swing after that, so barely turning the
channel off (Not driving the gate all the way down to zero.) causes less charge
to be "transferred" and a smaller voltage spike.

The same applies for the turn on (Cgd only injects charge when the channel is off.) And now everything is faster 'cause the charge only sees the channel resistance which is a lot less than my 100 k ohm.

Would a Jfet or depletion mode fet be any better?
The spikes would have the opposite phase..
is the capacitance smaller in a jfet?

George H.


--

John Larkin Highland Technology, Inc
picosecond timing laser drivers and controllers

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com
Click to expand...
 
On Thursday, June 11, 2015 at 12:27:33 PM UTC-4, John Larkin wrote:
On Thu, 11 Jun 2015 07:45:15 -0700 (PDT), George Herold
gherold@teachspin.com> wrote:

On Thursday, June 11, 2015 at 1:00:29 AM UTC-4, John Larkin wrote:
On Wed, 10 Jun 2015 08:08:27 -0700 (PDT), George Herold
gherold@teachspin.com> wrote:

On Monday, June 8, 2015 at 10:18:00 PM UTC-4, George Herold wrote:
On Monday, June 8, 2015 at 6:58:05 PM UTC-4, John Larkin wrote:
On Mon, 8 Jun 2015 07:03:57 -0700 (PDT), George Herold
gherold@teachspin.com> wrote:

I'm switching a high impedance (~100 k ohm) with a fet.

I wanted to make a dummy signal of a
photoconductive detector. The detector resistance is about
10 Meg ohms and changes by ~ 1%.
Here's the circuit I built.

V bias ~1-2V-----------+
|
R bias (10 Meg)
|
+---------------> signal out
|
R sig (10 Meg)
|
|
+----+ |
____| |___>----------+

V gate 0-7 V. +-+--------------> signal out
|
Gnd




Why the fet? Can't you just poke the signal generator into the
circuit?
Head slap, Yeah that would work.

There is some question, about how to drive the
delta R. (Currently the bias R is equal to the
signal R. I'm thinking a bigger bias R will give
almost twice the signal. Well we have to agree on what's
"constant" current or voltage.
The 2N7000 has a lot of g-d capacitance.
Yeah.. and my 100k ohm resistor doesn't
drain it very fast.

Can I switch a relay at ~1 kHz?
(I guess I only need a good edge..
to measure the frequency response.)

George H.



--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

Hi guys (and any gals) OK I officially don't understand Fet's now.
I was playing around with the above circuit. (switching 100 k ohm in and out.)
(Except I replaced the two 10 Meg's with 1 Meg to give me more signal on the 'scope.)

Here are some 'scope shots made with our new TEK1052B. (Images are jpeg's
'cause the bmp's were ~1 Meg byte each and took to long to write the the thumb
drive.)

https://www.dropbox.com/sh/ajth8kdqvasnb66/AAAhFmd98y93uZjhjxfJfLH4a?dl=0

Chan 1. is the drive (gate) and chan 2. the signal across the 100 k R.

I've mostly been looking at the signal where the fet is turned off.
TEK000 is with 0-2 V of drive. (about the min. to turn the FET on.)

So I figured more drive voltage on the gate would give me a bigger spike.
(more charge .. C*V)
TEK001 is with 0-6.5 V.. spike is almost exactly the same!
Why is that? Charge injected is independent of the max gate voltage?
It's not a capacitor.. but something more complicated?


There's a bunch of gate-drain capacitance, so when the channel is open
(ie, the fet is off), the drain voltage follows the gate drive
voltage, differentiated. But when the gate gets more positive than +2
or so, the d-s channel turns on and that shorts the drain to ground
pretty hard. The capacitive coupling from gate to drain is
non-inverting, but the fet gain is inverting.

There's also a substrate diode, namely a diode from source to drain.
It will limit the negative drain swing to -0.6 or so.

And all that happens at the same time!
OK, thanks.
(The following is mostly for me.. you are the
intelligent audience, but you don't have to read or respond.
It's enough that I think someone intelligent is reading)

So I'm thinking it's mostly the gate drain C.
It doesn't depend on the size of the gate voltage because
it's only when the channel cuts off (at ~2V) that the capacitance matters.
But it does depend on the gate voltage swing after that, so barely turning the
channel off (Not driving the gate all the way down to zero.) causes less charge
to be "transferred" and a smaller voltage spike.

The same applies for the turn on (Cgd only injects charge when the channel is off.) And now everything is faster 'cause the charge only sees the channel resistance which is a lot less than my 100 k ohm.

Would a Jfet or depletion mode fet be any better?
The spikes would have the opposite phase..
is the capacitance smaller in a jfet?

Depletion fets would be about the same.

Any smaller-geometry part will have less charge coupling, so a tiny
mosfet or jfet might be better.
Click to expand...

Hey, I found a nice jfet in my parts box (pn4118) ~3pF.
Much nicer!

TEK006 and 007 in above dropbox link. (You know I do like your
technique of taking photo's... with sticky notes stuck on.)

George H.
PHEMTS (like NE3508) have absurdly small g-d capacitance and no
substrate diode, but might be a little leaky for use in very hi-z
circuits.


--

John Larkin Highland Technology, Inc
picosecond timing laser drivers and controllers

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com
Click to expand...
 
On Thu, 11 Jun 2015 07:45:15 -0700 (PDT), George Herold
<gherold@teachspin.com> wrote:

On Thursday, June 11, 2015 at 1:00:29 AM UTC-4, John Larkin wrote:
On Wed, 10 Jun 2015 08:08:27 -0700 (PDT), George Herold
gherold@teachspin.com> wrote:

On Monday, June 8, 2015 at 10:18:00 PM UTC-4, George Herold wrote:
On Monday, June 8, 2015 at 6:58:05 PM UTC-4, John Larkin wrote:
On Mon, 8 Jun 2015 07:03:57 -0700 (PDT), George Herold
gherold@teachspin.com> wrote:

I'm switching a high impedance (~100 k ohm) with a fet.

I wanted to make a dummy signal of a
photoconductive detector. The detector resistance is about
10 Meg ohms and changes by ~ 1%.
Here's the circuit I built.

V bias ~1-2V-----------+
|
R bias (10 Meg)
|
+---------------> signal out
|
R sig (10 Meg)
|
|
+----+ |
____| |___>----------+

V gate 0-7 V. +-+--------------> signal out
|
Gnd




Why the fet? Can't you just poke the signal generator into the
circuit?
Head slap, Yeah that would work.

There is some question, about how to drive the
delta R. (Currently the bias R is equal to the
signal R. I'm thinking a bigger bias R will give
almost twice the signal. Well we have to agree on what's
"constant" current or voltage.
The 2N7000 has a lot of g-d capacitance.
Yeah.. and my 100k ohm resistor doesn't
drain it very fast.

Can I switch a relay at ~1 kHz?
(I guess I only need a good edge..
to measure the frequency response.)

George H.



--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

Hi guys (and any gals) OK I officially don't understand Fet's now.
I was playing around with the above circuit. (switching 100 k ohm in and out.)
(Except I replaced the two 10 Meg's with 1 Meg to give me more signal on the 'scope.)

Here are some 'scope shots made with our new TEK1052B. (Images are jpeg's
'cause the bmp's were ~1 Meg byte each and took to long to write the the thumb
drive.)

https://www.dropbox.com/sh/ajth8kdqvasnb66/AAAhFmd98y93uZjhjxfJfLH4a?dl=0

Chan 1. is the drive (gate) and chan 2. the signal across the 100 k R.

I've mostly been looking at the signal where the fet is turned off.
TEK000 is with 0-2 V of drive. (about the min. to turn the FET on.)

So I figured more drive voltage on the gate would give me a bigger spike.
(more charge .. C*V)
TEK001 is with 0-6.5 V.. spike is almost exactly the same!
Why is that? Charge injected is independent of the max gate voltage?
It's not a capacitor.. but something more complicated?


There's a bunch of gate-drain capacitance, so when the channel is open
(ie, the fet is off), the drain voltage follows the gate drive
voltage, differentiated. But when the gate gets more positive than +2
or so, the d-s channel turns on and that shorts the drain to ground
pretty hard. The capacitive coupling from gate to drain is
non-inverting, but the fet gain is inverting.

There's also a substrate diode, namely a diode from source to drain.
It will limit the negative drain swing to -0.6 or so.

And all that happens at the same time!
OK, thanks.
(The following is mostly for me.. you are the
intelligent audience, but you don't have to read or respond.
It's enough that I think someone intelligent is reading)

So I'm thinking it's mostly the gate drain C.
It doesn't depend on the size of the gate voltage because
it's only when the channel cuts off (at ~2V) that the capacitance matters.
But it does depend on the gate voltage swing after that, so barely turning the
channel off (Not driving the gate all the way down to zero.) causes less charge
to be "transferred" and a smaller voltage spike.

The same applies for the turn on (Cgd only injects charge when the channel is off.) And now everything is faster 'cause the charge only sees the channel resistance which is a lot less than my 100 k ohm.

Would a Jfet or depletion mode fet be any better?
The spikes would have the opposite phase..
is the capacitance smaller in a jfet?
Click to expand...

Depletion fets would be about the same.

Any smaller-geometry part will have less charge coupling, so a tiny
mosfet or jfet might be better.

PHEMTS (like NE3508) have absurdly small g-d capacitance and no
substrate diode, but might be a little leaky for use in very hi-z
circuits.


--

John Larkin Highland Technology, Inc
picosecond timing laser drivers and controllers

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com
 
On 6/11/2015 12:27 PM, John Larkin wrote:
On Thu, 11 Jun 2015 07:45:15 -0700 (PDT), George Herold
gherold@teachspin.com> wrote:

On Thursday, June 11, 2015 at 1:00:29 AM UTC-4, John Larkin wrote:
On Wed, 10 Jun 2015 08:08:27 -0700 (PDT), George Herold
gherold@teachspin.com> wrote:

On Monday, June 8, 2015 at 10:18:00 PM UTC-4, George Herold wrote:
On Monday, June 8, 2015 at 6:58:05 PM UTC-4, John Larkin wrote:
On Mon, 8 Jun 2015 07:03:57 -0700 (PDT), George Herold
gherold@teachspin.com> wrote:

I'm switching a high impedance (~100 k ohm) with a fet.

I wanted to make a dummy signal of a
photoconductive detector. The detector resistance is about
10 Meg ohms and changes by ~ 1%.
Here's the circuit I built.

V bias ~1-2V-----------+
|
R bias (10 Meg)
|
+---------------> signal out
|
R sig (10 Meg)
|
|
+----+ |
____| |___>----------+

V gate 0-7 V. +-+--------------> signal out
|
Gnd




Why the fet? Can't you just poke the signal generator into the
circuit?
Head slap, Yeah that would work.

There is some question, about how to drive the
delta R. (Currently the bias R is equal to the
signal R. I'm thinking a bigger bias R will give
almost twice the signal. Well we have to agree on what's
"constant" current or voltage.
The 2N7000 has a lot of g-d capacitance.
Yeah.. and my 100k ohm resistor doesn't
drain it very fast.

Can I switch a relay at ~1 kHz?
(I guess I only need a good edge..
to measure the frequency response.)

George H.



--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

Hi guys (and any gals) OK I officially don't understand Fet's now.
I was playing around with the above circuit. (switching 100 k ohm in and out.)
(Except I replaced the two 10 Meg's with 1 Meg to give me more signal on the 'scope.)

Here are some 'scope shots made with our new TEK1052B. (Images are jpeg's
'cause the bmp's were ~1 Meg byte each and took to long to write the the thumb
drive.)

https://www.dropbox.com/sh/ajth8kdqvasnb66/AAAhFmd98y93uZjhjxfJfLH4a?dl=0

Chan 1. is the drive (gate) and chan 2. the signal across the 100 k R.

I've mostly been looking at the signal where the fet is turned off.
TEK000 is with 0-2 V of drive. (about the min. to turn the FET on.)

So I figured more drive voltage on the gate would give me a bigger spike.
(more charge .. C*V)
TEK001 is with 0-6.5 V.. spike is almost exactly the same!
Why is that? Charge injected is independent of the max gate voltage?
It's not a capacitor.. but something more complicated?


There's a bunch of gate-drain capacitance, so when the channel is open
(ie, the fet is off), the drain voltage follows the gate drive
voltage, differentiated. But when the gate gets more positive than +2
or so, the d-s channel turns on and that shorts the drain to ground
pretty hard. The capacitive coupling from gate to drain is
non-inverting, but the fet gain is inverting.

There's also a substrate diode, namely a diode from source to drain.
It will limit the negative drain swing to -0.6 or so.

And all that happens at the same time!
OK, thanks.
(The following is mostly for me.. you are the
intelligent audience, but you don't have to read or respond.
It's enough that I think someone intelligent is reading)

So I'm thinking it's mostly the gate drain C.
It doesn't depend on the size of the gate voltage because
it's only when the channel cuts off (at ~2V) that the capacitance matters.
But it does depend on the gate voltage swing after that, so barely turning the
channel off (Not driving the gate all the way down to zero.) causes less charge
to be "transferred" and a smaller voltage spike.

The same applies for the turn on (Cgd only injects charge when the channel is off.) And now everything is faster 'cause the charge only sees the channel resistance which is a lot less than my 100 k ohm.

Would a Jfet or depletion mode fet be any better?
The spikes would have the opposite phase..
is the capacitance smaller in a jfet?

Depletion fets would be about the same.

Any smaller-geometry part will have less charge coupling, so a tiny
mosfet or jfet might be better.

PHEMTS (like NE3508) have absurdly small g-d capacitance and no
substrate diode, but might be a little leaky for use in very hi-z
circuits.
Click to expand...

I've never measured the leakage. How bad is it?

Cheers

Phil Hobbs



--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510

hobbs at electrooptical dot net
http://electrooptical.net
 
On Thu, 11 Jun 2015 12:42:05 -0400, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

On 6/11/2015 12:27 PM, John Larkin wrote:
On Thu, 11 Jun 2015 07:45:15 -0700 (PDT), George Herold
gherold@teachspin.com> wrote:

On Thursday, June 11, 2015 at 1:00:29 AM UTC-4, John Larkin wrote:
On Wed, 10 Jun 2015 08:08:27 -0700 (PDT), George Herold
gherold@teachspin.com> wrote:

On Monday, June 8, 2015 at 10:18:00 PM UTC-4, George Herold wrote:
On Monday, June 8, 2015 at 6:58:05 PM UTC-4, John Larkin wrote:
On Mon, 8 Jun 2015 07:03:57 -0700 (PDT), George Herold
gherold@teachspin.com> wrote:

I'm switching a high impedance (~100 k ohm) with a fet.

I wanted to make a dummy signal of a
photoconductive detector. The detector resistance is about
10 Meg ohms and changes by ~ 1%.
Here's the circuit I built.

V bias ~1-2V-----------+
|
R bias (10 Meg)
|
+---------------> signal out
|
R sig (10 Meg)
|
|
+----+ |
____| |___>----------+

V gate 0-7 V. +-+--------------> signal out
|
Gnd




Why the fet? Can't you just poke the signal generator into the
circuit?
Head slap, Yeah that would work.

There is some question, about how to drive the
delta R. (Currently the bias R is equal to the
signal R. I'm thinking a bigger bias R will give
almost twice the signal. Well we have to agree on what's
"constant" current or voltage.
The 2N7000 has a lot of g-d capacitance.
Yeah.. and my 100k ohm resistor doesn't
drain it very fast.

Can I switch a relay at ~1 kHz?
(I guess I only need a good edge..
to measure the frequency response.)

George H.



--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

Hi guys (and any gals) OK I officially don't understand Fet's now.
I was playing around with the above circuit. (switching 100 k ohm in and out.)
(Except I replaced the two 10 Meg's with 1 Meg to give me more signal on the 'scope.)

Here are some 'scope shots made with our new TEK1052B. (Images are jpeg's
'cause the bmp's were ~1 Meg byte each and took to long to write the the thumb
drive.)

https://www.dropbox.com/sh/ajth8kdqvasnb66/AAAhFmd98y93uZjhjxfJfLH4a?dl=0

Chan 1. is the drive (gate) and chan 2. the signal across the 100 k R.

I've mostly been looking at the signal where the fet is turned off.
TEK000 is with 0-2 V of drive. (about the min. to turn the FET on.)

So I figured more drive voltage on the gate would give me a bigger spike.
(more charge .. C*V)
TEK001 is with 0-6.5 V.. spike is almost exactly the same!
Why is that? Charge injected is independent of the max gate voltage?
It's not a capacitor.. but something more complicated?


There's a bunch of gate-drain capacitance, so when the channel is open
(ie, the fet is off), the drain voltage follows the gate drive
voltage, differentiated. But when the gate gets more positive than +2
or so, the d-s channel turns on and that shorts the drain to ground
pretty hard. The capacitive coupling from gate to drain is
non-inverting, but the fet gain is inverting.

There's also a substrate diode, namely a diode from source to drain.
It will limit the negative drain swing to -0.6 or so.

And all that happens at the same time!
OK, thanks.
(The following is mostly for me.. you are the
intelligent audience, but you don't have to read or respond.
It's enough that I think someone intelligent is reading)

So I'm thinking it's mostly the gate drain C.
It doesn't depend on the size of the gate voltage because
it's only when the channel cuts off (at ~2V) that the capacitance matters.
But it does depend on the gate voltage swing after that, so barely turning the
channel off (Not driving the gate all the way down to zero.) causes less charge
to be "transferred" and a smaller voltage spike.

The same applies for the turn on (Cgd only injects charge when the channel is off.) And now everything is faster 'cause the charge only sees the channel resistance which is a lot less than my 100 k ohm.

Would a Jfet or depletion mode fet be any better?
The spikes would have the opposite phase..
is the capacitance smaller in a jfet?

Depletion fets would be about the same.

Any smaller-geometry part will have less charge coupling, so a tiny
mosfet or jfet might be better.

PHEMTS (like NE3508) have absurdly small g-d capacitance and no
substrate diode, but might be a little leaky for use in very hi-z
circuits.

I've never measured the leakage. How bad is it?
Click to expand...

This is the 3509, and a 3508 is essentially half of a 3509. I didn't
really resolve the low end.

https://dl.dropboxusercontent.com/u/53724080/Parts/Fets/NE3509_Leakage.JPG

Drain leakage is typically minimum at some negative gate voltage, and
then goes back up as direct gate-drain current kicks in.


--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com
 
On 06/11/2015 02:54 PM, John Larkin wrote:
On Thu, 11 Jun 2015 12:42:05 -0400, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

On 6/11/2015 12:27 PM, John Larkin wrote:
On Thu, 11 Jun 2015 07:45:15 -0700 (PDT), George Herold
gherold@teachspin.com> wrote:

On Thursday, June 11, 2015 at 1:00:29 AM UTC-4, John Larkin wrote:
On Wed, 10 Jun 2015 08:08:27 -0700 (PDT), George Herold
gherold@teachspin.com> wrote:

On Monday, June 8, 2015 at 10:18:00 PM UTC-4, George Herold wrote:
On Monday, June 8, 2015 at 6:58:05 PM UTC-4, John Larkin wrote:
On Mon, 8 Jun 2015 07:03:57 -0700 (PDT), George Herold
gherold@teachspin.com> wrote:

I'm switching a high impedance (~100 k ohm) with a fet.

I wanted to make a dummy signal of a
photoconductive detector. The detector resistance is about
10 Meg ohms and changes by ~ 1%.
Here's the circuit I built.

V bias ~1-2V-----------+
|
R bias (10 Meg)
|
+---------------> signal out
|
R sig (10 Meg)
|
|
+----+ |
____| |___>----------+

V gate 0-7 V. +-+--------------> signal out
|
Gnd




Why the fet? Can't you just poke the signal generator into the
circuit?
Head slap, Yeah that would work.

There is some question, about how to drive the
delta R. (Currently the bias R is equal to the
signal R. I'm thinking a bigger bias R will give
almost twice the signal. Well we have to agree on what's
"constant" current or voltage.
The 2N7000 has a lot of g-d capacitance.
Yeah.. and my 100k ohm resistor doesn't
drain it very fast.

Can I switch a relay at ~1 kHz?
(I guess I only need a good edge..
to measure the frequency response.)

George H.



--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

Hi guys (and any gals) OK I officially don't understand Fet's now.
I was playing around with the above circuit. (switching 100 k ohm in and out.)
(Except I replaced the two 10 Meg's with 1 Meg to give me more signal on the 'scope.)

Here are some 'scope shots made with our new TEK1052B. (Images are jpeg's
'cause the bmp's were ~1 Meg byte each and took to long to write the the thumb
drive.)

https://www.dropbox.com/sh/ajth8kdqvasnb66/AAAhFmd98y93uZjhjxfJfLH4a?dl=0

Chan 1. is the drive (gate) and chan 2. the signal across the 100 k R.

I've mostly been looking at the signal where the fet is turned off.
TEK000 is with 0-2 V of drive. (about the min. to turn the FET on.)

So I figured more drive voltage on the gate would give me a bigger spike.
(more charge .. C*V)
TEK001 is with 0-6.5 V.. spike is almost exactly the same!
Why is that? Charge injected is independent of the max gate voltage?
It's not a capacitor.. but something more complicated?


There's a bunch of gate-drain capacitance, so when the channel is open
(ie, the fet is off), the drain voltage follows the gate drive
voltage, differentiated. But when the gate gets more positive than +2
or so, the d-s channel turns on and that shorts the drain to ground
pretty hard. The capacitive coupling from gate to drain is
non-inverting, but the fet gain is inverting.

There's also a substrate diode, namely a diode from source to drain.
It will limit the negative drain swing to -0.6 or so.

And all that happens at the same time!
OK, thanks.
(The following is mostly for me.. you are the
intelligent audience, but you don't have to read or respond.
It's enough that I think someone intelligent is reading)

So I'm thinking it's mostly the gate drain C.
It doesn't depend on the size of the gate voltage because
it's only when the channel cuts off (at ~2V) that the capacitance matters.
But it does depend on the gate voltage swing after that, so barely turning the
channel off (Not driving the gate all the way down to zero.) causes less charge
to be "transferred" and a smaller voltage spike.

The same applies for the turn on (Cgd only injects charge when the channel is off.) And now everything is faster 'cause the charge only sees the channel resistance which is a lot less than my 100 k ohm.

Would a Jfet or depletion mode fet be any better?
The spikes would have the opposite phase..
is the capacitance smaller in a jfet?

Depletion fets would be about the same.

Any smaller-geometry part will have less charge coupling, so a tiny
mosfet or jfet might be better.

PHEMTS (like NE3508) have absurdly small g-d capacitance and no
substrate diode, but might be a little leaky for use in very hi-z
circuits.

I've never measured the leakage. How bad is it?

This is the 3509, and a 3508 is essentially half of a 3509. I didn't
really resolve the low end.

https://dl.dropboxusercontent.com/u/53724080/Parts/Fets/NE3509_Leakage.JPG

Drain leakage is typically minimum at some negative gate voltage, and
then goes back up as direct gate-drain current kicks in.
Click to expand...

Interesting, thanks. Have to get that curve tracer built one of these days.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510

hobbs at electrooptical dot net
http://electrooptical.net
 
On Thu, 11 Jun 2015 15:57:10 -0400, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

On 06/11/2015 02:54 PM, John Larkin wrote:
On Thu, 11 Jun 2015 12:42:05 -0400, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

On 6/11/2015 12:27 PM, John Larkin wrote:
On Thu, 11 Jun 2015 07:45:15 -0700 (PDT), George Herold
gherold@teachspin.com> wrote:

On Thursday, June 11, 2015 at 1:00:29 AM UTC-4, John Larkin wrote:
On Wed, 10 Jun 2015 08:08:27 -0700 (PDT), George Herold
gherold@teachspin.com> wrote:

On Monday, June 8, 2015 at 10:18:00 PM UTC-4, George Herold wrote:
On Monday, June 8, 2015 at 6:58:05 PM UTC-4, John Larkin wrote:
On Mon, 8 Jun 2015 07:03:57 -0700 (PDT), George Herold
gherold@teachspin.com> wrote:

I'm switching a high impedance (~100 k ohm) with a fet.

I wanted to make a dummy signal of a
photoconductive detector. The detector resistance is about
10 Meg ohms and changes by ~ 1%.
Here's the circuit I built.

V bias ~1-2V-----------+
|
R bias (10 Meg)
|
+---------------> signal out
|
R sig (10 Meg)
|
|
+----+ |
____| |___>----------+

V gate 0-7 V. +-+--------------> signal out
|
Gnd




Why the fet? Can't you just poke the signal generator into the
circuit?
Head slap, Yeah that would work.

There is some question, about how to drive the
delta R. (Currently the bias R is equal to the
signal R. I'm thinking a bigger bias R will give
almost twice the signal. Well we have to agree on what's
"constant" current or voltage.
The 2N7000 has a lot of g-d capacitance.
Yeah.. and my 100k ohm resistor doesn't
drain it very fast.

Can I switch a relay at ~1 kHz?
(I guess I only need a good edge..
to measure the frequency response.)

George H.



--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

Hi guys (and any gals) OK I officially don't understand Fet's now.
I was playing around with the above circuit. (switching 100 k ohm in and out.)
(Except I replaced the two 10 Meg's with 1 Meg to give me more signal on the 'scope.)

Here are some 'scope shots made with our new TEK1052B. (Images are jpeg's
'cause the bmp's were ~1 Meg byte each and took to long to write the the thumb
drive.)

https://www.dropbox.com/sh/ajth8kdqvasnb66/AAAhFmd98y93uZjhjxfJfLH4a?dl=0

Chan 1. is the drive (gate) and chan 2. the signal across the 100 k R.

I've mostly been looking at the signal where the fet is turned off.
TEK000 is with 0-2 V of drive. (about the min. to turn the FET on.)

So I figured more drive voltage on the gate would give me a bigger spike.
(more charge .. C*V)
TEK001 is with 0-6.5 V.. spike is almost exactly the same!
Why is that? Charge injected is independent of the max gate voltage?
It's not a capacitor.. but something more complicated?


There's a bunch of gate-drain capacitance, so when the channel is open
(ie, the fet is off), the drain voltage follows the gate drive
voltage, differentiated. But when the gate gets more positive than +2
or so, the d-s channel turns on and that shorts the drain to ground
pretty hard. The capacitive coupling from gate to drain is
non-inverting, but the fet gain is inverting.

There's also a substrate diode, namely a diode from source to drain.
It will limit the negative drain swing to -0.6 or so.

And all that happens at the same time!
OK, thanks.
(The following is mostly for me.. you are the
intelligent audience, but you don't have to read or respond.
It's enough that I think someone intelligent is reading)

So I'm thinking it's mostly the gate drain C.
It doesn't depend on the size of the gate voltage because
it's only when the channel cuts off (at ~2V) that the capacitance matters.
But it does depend on the gate voltage swing after that, so barely turning the
channel off (Not driving the gate all the way down to zero.) causes less charge
to be "transferred" and a smaller voltage spike.

The same applies for the turn on (Cgd only injects charge when the channel is off.) And now everything is faster 'cause the charge only sees the channel resistance which is a lot less than my 100 k ohm.

Would a Jfet or depletion mode fet be any better?
The spikes would have the opposite phase..
is the capacitance smaller in a jfet?

Depletion fets would be about the same.

Any smaller-geometry part will have less charge coupling, so a tiny
mosfet or jfet might be better.

PHEMTS (like NE3508) have absurdly small g-d capacitance and no
substrate diode, but might be a little leaky for use in very hi-z
circuits.

I've never measured the leakage. How bad is it?

This is the 3509, and a 3508 is essentially half of a 3509. I didn't
really resolve the low end.

https://dl.dropboxusercontent.com/u/53724080/Parts/Fets/NE3509_Leakage.JPG

Drain leakage is typically minimum at some negative gate voltage, and
then goes back up as direct gate-drain current kicks in.



Interesting, thanks. Have to get that curve tracer built one of these days.

Cheers

Phil Hobbs
Click to expand...

I just got a quote from Keithley on a system that could measure c-v
curves on diodes and such. Depending on the goody level, it was $30-50
K.



--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com
 
On 06/11/2015 04:02 PM, John Larkin wrote:
On Thu, 11 Jun 2015 15:57:10 -0400, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

On 06/11/2015 02:54 PM, John Larkin wrote:
On Thu, 11 Jun 2015 12:42:05 -0400, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

On 6/11/2015 12:27 PM, John Larkin wrote:
On Thu, 11 Jun 2015 07:45:15 -0700 (PDT), George Herold
gherold@teachspin.com> wrote:

On Thursday, June 11, 2015 at 1:00:29 AM UTC-4, John Larkin wrote:
On Wed, 10 Jun 2015 08:08:27 -0700 (PDT), George Herold
gherold@teachspin.com> wrote:

On Monday, June 8, 2015 at 10:18:00 PM UTC-4, George Herold wrote:
On Monday, June 8, 2015 at 6:58:05 PM UTC-4, John Larkin wrote:
On Mon, 8 Jun 2015 07:03:57 -0700 (PDT), George Herold
gherold@teachspin.com> wrote:

I'm switching a high impedance (~100 k ohm) with a fet.

I wanted to make a dummy signal of a
photoconductive detector. The detector resistance is about
10 Meg ohms and changes by ~ 1%.
Here's the circuit I built.

V bias ~1-2V-----------+
|
R bias (10 Meg)
|
+---------------> signal out
|
R sig (10 Meg)
|
|
+----+ |
____| |___>----------+

V gate 0-7 V. +-+--------------> signal out
|
Gnd




Why the fet? Can't you just poke the signal generator into the
circuit?
Head slap, Yeah that would work.

There is some question, about how to drive the
delta R. (Currently the bias R is equal to the
signal R. I'm thinking a bigger bias R will give
almost twice the signal. Well we have to agree on what's
"constant" current or voltage.
The 2N7000 has a lot of g-d capacitance.
Yeah.. and my 100k ohm resistor doesn't
drain it very fast.

Can I switch a relay at ~1 kHz?
(I guess I only need a good edge..
to measure the frequency response.)

George H.



--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

Hi guys (and any gals) OK I officially don't understand Fet's now.
I was playing around with the above circuit. (switching 100 k ohm in and out.)
(Except I replaced the two 10 Meg's with 1 Meg to give me more signal on the 'scope.)

Here are some 'scope shots made with our new TEK1052B. (Images are jpeg's
'cause the bmp's were ~1 Meg byte each and took to long to write the the thumb
drive.)

https://www.dropbox.com/sh/ajth8kdqvasnb66/AAAhFmd98y93uZjhjxfJfLH4a?dl=0

Chan 1. is the drive (gate) and chan 2. the signal across the 100 k R.

I've mostly been looking at the signal where the fet is turned off.
TEK000 is with 0-2 V of drive. (about the min. to turn the FET on.)

So I figured more drive voltage on the gate would give me a bigger spike.
(more charge .. C*V)
TEK001 is with 0-6.5 V.. spike is almost exactly the same!
Why is that? Charge injected is independent of the max gate voltage?
It's not a capacitor.. but something more complicated?


There's a bunch of gate-drain capacitance, so when the channel is open
(ie, the fet is off), the drain voltage follows the gate drive
voltage, differentiated. But when the gate gets more positive than +2
or so, the d-s channel turns on and that shorts the drain to ground
pretty hard. The capacitive coupling from gate to drain is
non-inverting, but the fet gain is inverting.

There's also a substrate diode, namely a diode from source to drain.
It will limit the negative drain swing to -0.6 or so.

And all that happens at the same time!
OK, thanks.
(The following is mostly for me.. you are the
intelligent audience, but you don't have to read or respond.
It's enough that I think someone intelligent is reading)

So I'm thinking it's mostly the gate drain C.
It doesn't depend on the size of the gate voltage because
it's only when the channel cuts off (at ~2V) that the capacitance matters.
But it does depend on the gate voltage swing after that, so barely turning the
channel off (Not driving the gate all the way down to zero.) causes less charge
to be "transferred" and a smaller voltage spike.

The same applies for the turn on (Cgd only injects charge when the channel is off.) And now everything is faster 'cause the charge only sees the channel resistance which is a lot less than my 100 k ohm.

Would a Jfet or depletion mode fet be any better?
The spikes would have the opposite phase..
is the capacitance smaller in a jfet?

Depletion fets would be about the same.

Any smaller-geometry part will have less charge coupling, so a tiny
mosfet or jfet might be better.

PHEMTS (like NE3508) have absurdly small g-d capacitance and no
substrate diode, but might be a little leaky for use in very hi-z
circuits.

I've never measured the leakage. How bad is it?

This is the 3509, and a 3508 is essentially half of a 3509. I didn't
really resolve the low end.

https://dl.dropboxusercontent.com/u/53724080/Parts/Fets/NE3509_Leakage.JPG

Drain leakage is typically minimum at some negative gate voltage, and
then goes back up as direct gate-drain current kicks in.



Interesting, thanks. Have to get that curve tracer built one of these days.

Cheers

Phil Hobbs

I just got a quote from Keithley on a system that could measure c-v
curves on diodes and such. Depending on the goody level, it was $30-50
K.
Click to expand...

Nice work if you can get it!

Cheers

Phil Hobbs


--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510

hobbs at electrooptical dot net
http://electrooptical.net
 
On 06/11/2015 03:51 PM, George Herold wrote:
On Thursday, June 11, 2015 at 12:27:33 PM UTC-4, John Larkin wrote:
On Thu, 11 Jun 2015 07:45:15 -0700 (PDT), George Herold
gherold@teachspin.com> wrote:

On Thursday, June 11, 2015 at 1:00:29 AM UTC-4, John Larkin wrote:
On Wed, 10 Jun 2015 08:08:27 -0700 (PDT), George Herold
gherold@teachspin.com> wrote:

On Monday, June 8, 2015 at 10:18:00 PM UTC-4, George Herold wrote:
On Monday, June 8, 2015 at 6:58:05 PM UTC-4, John Larkin wrote:
On Mon, 8 Jun 2015 07:03:57 -0700 (PDT), George Herold
gherold@teachspin.com> wrote:

I'm switching a high impedance (~100 k ohm) with a fet.

I wanted to make a dummy signal of a
photoconductive detector. The detector resistance is about
10 Meg ohms and changes by ~ 1%.
Here's the circuit I built.

V bias ~1-2V-----------+
|
R bias (10 Meg)
|
+---------------> signal out
|
R sig (10 Meg)
|
|
+----+ |
____| |___>----------+

V gate 0-7 V. +-+--------------> signal out
|
Gnd




Why the fet? Can't you just poke the signal generator into the
circuit?
Head slap, Yeah that would work.

There is some question, about how to drive the
delta R. (Currently the bias R is equal to the
signal R. I'm thinking a bigger bias R will give
almost twice the signal. Well we have to agree on what's
"constant" current or voltage.
The 2N7000 has a lot of g-d capacitance.
Yeah.. and my 100k ohm resistor doesn't
drain it very fast.

Can I switch a relay at ~1 kHz?
(I guess I only need a good edge..
to measure the frequency response.)

George H.



--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

Hi guys (and any gals) OK I officially don't understand Fet's now.
I was playing around with the above circuit. (switching 100 k ohm in and out.)
(Except I replaced the two 10 Meg's with 1 Meg to give me more signal on the 'scope.)

Here are some 'scope shots made with our new TEK1052B. (Images are jpeg's
'cause the bmp's were ~1 Meg byte each and took to long to write the the thumb
drive.)

https://www.dropbox.com/sh/ajth8kdqvasnb66/AAAhFmd98y93uZjhjxfJfLH4a?dl=0

Chan 1. is the drive (gate) and chan 2. the signal across the 100 k R.

I've mostly been looking at the signal where the fet is turned off.
TEK000 is with 0-2 V of drive. (about the min. to turn the FET on.)

So I figured more drive voltage on the gate would give me a bigger spike.
(more charge .. C*V)
TEK001 is with 0-6.5 V.. spike is almost exactly the same!
Why is that? Charge injected is independent of the max gate voltage?
It's not a capacitor.. but something more complicated?


There's a bunch of gate-drain capacitance, so when the channel is open
(ie, the fet is off), the drain voltage follows the gate drive
voltage, differentiated. But when the gate gets more positive than +2
or so, the d-s channel turns on and that shorts the drain to ground
pretty hard. The capacitive coupling from gate to drain is
non-inverting, but the fet gain is inverting.

There's also a substrate diode, namely a diode from source to drain.
It will limit the negative drain swing to -0.6 or so.

And all that happens at the same time!
OK, thanks.
(The following is mostly for me.. you are the
intelligent audience, but you don't have to read or respond.
It's enough that I think someone intelligent is reading)

So I'm thinking it's mostly the gate drain C.
It doesn't depend on the size of the gate voltage because
it's only when the channel cuts off (at ~2V) that the capacitance matters.
But it does depend on the gate voltage swing after that, so barely turning the
channel off (Not driving the gate all the way down to zero.) causes less charge
to be "transferred" and a smaller voltage spike.

The same applies for the turn on (Cgd only injects charge when the channel is off.) And now everything is faster 'cause the charge only sees the channel resistance which is a lot less than my 100 k ohm.

Would a Jfet or depletion mode fet be any better?
The spikes would have the opposite phase..
is the capacitance smaller in a jfet?

Depletion fets would be about the same.

Any smaller-geometry part will have less charge coupling, so a tiny
mosfet or jfet might be better.

Hey, I found a nice jfet in my parts box (pn4118) ~3pF.
Much nicer!
Click to expand...

A dual gate MOSFET would be even better, but they're depletion mode like
your JFET.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510

hobbs at electrooptical dot net
http://electrooptical.net
 
On Mon, 8 Jun 2015 19:17:56 -0700 (PDT), George Herold
<gherold@teachspin.com> wrote:


Can I switch a relay at ~1 kHz?
(I guess I only need a good edge..
to measure the frequency response.)

George H.
Click to expand...

A mercury wetted reed relay will give you edges out to substantially
less than 100 picoseconds, but the ones I have (Fujitsu
FMR-824D06/1A) will only switch up to about 100 Hz.

If that'll work for you, email me a physical address I can send one
to and it's yours.

John Fields
 
On Thursday, June 11, 2015 at 5:49:01 PM UTC-4, John Fields wrote:
On Mon, 8 Jun 2015 19:17:56 -0700 (PDT), George Herold
gherold@teachspin.com> wrote:


Can I switch a relay at ~1 kHz?
(I guess I only need a good edge..
to measure the frequency response.)

George H.

A mercury wetted reed relay will give you edges out to substantially
less than 100 picoseconds, but the ones I have (Fujitsu
FMR-824D06/1A) will only switch up to about 100 Hz.

If that'll work for you, email me a physical address I can send one
to and it's yours.

John Fields
Click to expand...

Hi John, Gee, thanks for the offer. The little jeft looks to be fine.
And though I can look at the response from an edge and figure out the
BW, it will be harder for the grad. student I'm helping.
The easiest will be if we change the frequency of the square wave
and measure the response up top. (of the probe)

I know this may sound strange to you, but during testing last
week I got the impression that he was a little surprised to find
the frequency that we wiggled at the bottom was the same frequency
that was measured at the top. He wanted to check a few times, look
at frequency on generator, measure frequency with 'scope.... and
then of course the 'scope doens't always measure the right frequency.

George H.
 
In article <c694f567-d00f-4a36-88f7-0898ee7e93ef@googlegroups.com>,
gherold@teachspin.com says...
On Thursday, June 11, 2015 at 5:49:01 PM UTC-4, John Fields wrote:
On Mon, 8 Jun 2015 19:17:56 -0700 (PDT), George Herold
gherold@teachspin.com> wrote:


Can I switch a relay at ~1 kHz?
(I guess I only need a good edge..
to measure the frequency response.)

George H.

A mercury wetted reed relay will give you edges out to substantially
less than 100 picoseconds, but the ones I have (Fujitsu
FMR-824D06/1A) will only switch up to about 100 Hz.

If that'll work for you, email me a physical address I can send one
to and it's yours.

John Fields

Hi John, Gee, thanks for the offer. The little jeft looks to be fine.
And though I can look at the response from an edge and figure out the
BW, it will be harder for the grad. student I'm helping.
The easiest will be if we change the frequency of the square wave
and measure the response up top. (of the probe)

I know this may sound strange to you, but during testing last
week I got the impression that he was a little surprised to find
the frequency that we wiggled at the bottom was the same frequency
that was measured at the top. He wanted to check a few times, look
at frequency on generator, measure frequency with 'scope.... and
then of course the 'scope doens't always measure the right frequency.

George H.
Click to expand...

How's that? I've always had good luck with my scopes reporting
correct frequencys?

I can understand maybe an analog not being rite on but even my
Tek 350Mhz analog, seems to be good with in reason.

I mean I wouldn't use it as a precise indicator..

Jamie
 
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