faster ECL

J

John Larkin

Guest
We stock the MC10EP89, which is a great part, but it's kinda slow. I
was thinking that adding a couple of diodes, and maybe inductors,
could speed it up, given a single 3.3 volt supply. The next chip will
be CML compatible and doesn't need much swing.

https://www.dropbox.com/s/jqj9zc1oolzdoo4/ECL_Faster.JPG?raw=1


--

John Larkin Highland Technology, Inc

lunatic fringe electronics
 
On 7/2/19 12:05 PM, John Larkin wrote:
We stock the MC10EP89, which is a great part, but it's kinda slow. I
was thinking that adding a couple of diodes, and maybe inductors,
could speed it up, given a single 3.3 volt supply. The next chip will
be CML compatible and doesn't need much swing.

https://www.dropbox.com/s/jqj9zc1oolzdoo4/ECL_Faster.JPG?raw=1
Click to expand...

Can U bootstrap its supply from the outputs?
 
On Tue, 2 Jul 2019 13:51:32 -0400, bitrex <user@example.net> wrote:

On 7/2/19 12:05 PM, John Larkin wrote:

We stock the MC10EP89, which is a great part, but it's kinda slow. I
was thinking that adding a couple of diodes, and maybe inductors,
could speed it up, given a single 3.3 volt supply. The next chip will
be CML compatible and doesn't need much swing.

https://www.dropbox.com/s/jqj9zc1oolzdoo4/ECL_Faster.JPG?raw=1



Can U bootstrap its supply from the outputs?
Click to expand...

How would that work?


--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com
 
On 7/2/19 2:04 PM, John Larkin wrote:
On Tue, 2 Jul 2019 13:51:32 -0400, bitrex <user@example.net> wrote:

On 7/2/19 12:05 PM, John Larkin wrote:

We stock the MC10EP89, which is a great part, but it's kinda slow. I
was thinking that adding a couple of diodes, and maybe inductors,
could speed it up, given a single 3.3 volt supply. The next chip will
be CML compatible and doesn't need much swing.

https://www.dropbox.com/s/jqj9zc1oolzdoo4/ECL_Faster.JPG?raw=1



Can U bootstrap its supply from the outputs?

How would that work?
Click to expand...

Are the outputs open-emitter e.g.:

<https://www.allaboutcircuits.com/uploads/articles/Fig1m6292018.png>

?
 
On 7/2/19 2:37 PM, bitrex wrote:
On 7/2/19 2:04 PM, John Larkin wrote:
On Tue, 2 Jul 2019 13:51:32 -0400, bitrex <user@example.net> wrote:

On 7/2/19 12:05 PM, John Larkin wrote:

We stock the MC10EP89, which is a great part, but it's kinda slow. I
was thinking that adding a couple of diodes, and maybe inductors,
could speed it up, given a single 3.3 volt supply. The next chip will
be CML compatible and doesn't need much swing.

https://www.dropbox.com/s/jqj9zc1oolzdoo4/ECL_Faster.JPG?raw=1



Can U bootstrap its supply from the outputs?

How would that work?



Are the outputs open-emitter e.g.:

https://www.allaboutcircuits.com/uploads/articles/Fig1m6292018.png

?
Click to expand...

the idea is that the supply rails float up and down a bit so you get the
available-drive-power advantages of operating from a "virtual" 5 v
supply without actually making the output Q bases swing more than they
would @ 3.3
 
On 7/2/19 2:58 PM, Gerhard Hoffmann wrote:
Am 02.07.19 um 20:44 schrieb bitrex:
On 7/2/19 2:37 PM, bitrex wrote:
On 7/2/19 2:04 PM, John Larkin wrote:
On Tue, 2 Jul 2019 13:51:32 -0400, bitrex <user@example.net> wrote:

On 7/2/19 12:05 PM, John Larkin wrote:

We stock the MC10EP89, which is a great part, but it's kinda slow. I
was thinking that adding a couple of diodes, and maybe inductors,
could speed it up, given a single 3.3 volt supply. The next chip will
be CML compatible and doesn't need much swing.

https://www.dropbox.com/s/jqj9zc1oolzdoo4/ECL_Faster.JPG?raw=1



Can U bootstrap its supply from the outputs?

How would that work?



Are the outputs open-emitter e.g.:

https://www.allaboutcircuits.com/uploads/articles/Fig1m6292018.png

?

the idea is that the supply rails float up and down a bit so you get
the available-drive-power advantages of operating from a "virtual" 5 v
supply without actually making the output Q bases swing more than they
would @ 3.3

Would bootstrapping for Q not un-bootstrap for not_Q?
The EP89 already has double output voltage swing.
Click to expand...

If the outputs are open-emitter as in the simplified ECL-buffer
schematic (it's clearly a somewhat more complex IC from the datasheet,
and they don't show you all the insides) then positive-going is an
emitter-loaded transistor switch to the positive supply and
negative-going is an external resistor pull-down to ground.

in that situation the only thing that's being boostrapped is the
positive-going drive supply, and the diff pairs; their collectors are
always operating somewhere in the linear region they don't "care" where
the supplies are exactly

so at quiescent you could do 3.3 and 0, Q goes up, pulls positive supply
up to 5 and also a bootstrap to make "ground" pull up to 1.7, you get 5V
drive for Q, and looks to me like not-Q still pulls down to ground same
as before
 
Am 02.07.19 um 20:44 schrieb bitrex:
On 7/2/19 2:37 PM, bitrex wrote:
On 7/2/19 2:04 PM, John Larkin wrote:
On Tue, 2 Jul 2019 13:51:32 -0400, bitrex <user@example.net> wrote:

On 7/2/19 12:05 PM, John Larkin wrote:

We stock the MC10EP89, which is a great part, but it's kinda slow. I
was thinking that adding a couple of diodes, and maybe inductors,
could speed it up, given a single 3.3 volt supply. The next chip will
be CML compatible and doesn't need much swing.

https://www.dropbox.com/s/jqj9zc1oolzdoo4/ECL_Faster.JPG?raw=1



Can U bootstrap its supply from the outputs?

How would that work?



Are the outputs open-emitter e.g.:

https://www.allaboutcircuits.com/uploads/articles/Fig1m6292018.png

?

the idea is that the supply rails float up and down a bit so you get the
available-drive-power advantages of operating from a "virtual" 5 v
supply without actually making the output Q bases swing more than they
would @ 3.3
Click to expand...

Would bootstrapping for Q not un-bootstrap for not_Q?
The EP89 already has double output voltage swing.
 
On Tue, 2 Jul 2019 20:58:56 +0200, Gerhard Hoffmann <dk4xp@arcor.de>
wrote:

Am 02.07.19 um 20:44 schrieb bitrex:
On 7/2/19 2:37 PM, bitrex wrote:
On 7/2/19 2:04 PM, John Larkin wrote:
On Tue, 2 Jul 2019 13:51:32 -0400, bitrex <user@example.net> wrote:

On 7/2/19 12:05 PM, John Larkin wrote:

We stock the MC10EP89, which is a great part, but it's kinda slow. I
was thinking that adding a couple of diodes, and maybe inductors,
could speed it up, given a single 3.3 volt supply. The next chip will
be CML compatible and doesn't need much swing.

https://www.dropbox.com/s/jqj9zc1oolzdoo4/ECL_Faster.JPG?raw=1



Can U bootstrap its supply from the outputs?

How would that work?



Are the outputs open-emitter e.g.:

https://www.allaboutcircuits.com/uploads/articles/Fig1m6292018.png

?

the idea is that the supply rails float up and down a bit so you get the
available-drive-power advantages of operating from a "virtual" 5 v
supply without actually making the output Q bases swing more than they
would @ 3.3

Would bootstrapping for Q not un-bootstrap for not_Q?
The EP89 already has double output voltage swing.
Click to expand...

The double swing probably slows it down, especially on the negative
swing with the passive pulldown. Vlow is only about 1.5 volts above
ground, so the pulldown resistor current is low. The inductors might
improve the pulldown edge by sustaining the current for a while.

I've tried Spicing this, but I didn't have a believable ECL model...
just something I've hacked out of transistors.

Hints are that a resistor between the complementary ECL outputs is a
better speedup than the diodes.

Time to Dremel, I guess.


--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com
 
John Larkin <jjlarkin@highland_snip_technology.com> wrote:

On 7/2/19 12:05 PM, John Larkin wrote:

We stock the MC10EP89, which is a great part, but it's kinda slow.
I was thinking that adding a couple of diodes, and maybe
inductors, could speed it up, given a single 3.3 volt supply. The
next chip will be CML compatible and doesn't need much swing.

https://www.dropbox.com/s/jqj9zc1oolzdoo4/ECL_Faster.JPG?raw=1

The double swing probably slows it down, especially on the negative
swing with the passive pulldown. Vlow is only about 1.5 volts above
ground, so the pulldown resistor current is low. The inductors might
improve the pulldown edge by sustaining the current for a while.

I've tried Spicing this, but I didn't have a believable ECL model...
just something I've hacked out of transistors.

Hints are that a resistor between the complementary ECL outputs is a
better speedup than the diodes.

Time to Dremel, I guess.
Click to expand...

Have you looked at the NBSG16M? 10GHz CML:

"The NBSG16M is a differential current mode logic (CML) receiver/driver.
The device is functionally equivalent to the EP16, LVEP16, or SG16 devices
with CML output structure and lower EMI capabilities.

Inputs incorporate internal 50 Ohm termination resistors and accept NECL
(Negative ECL), PECL (Positive ECL), LVTTL, LVCMOS, CML, or LVDS. The CML
output structure contains internal 50 Ohm source termination resistor to
VCC. The device generates 400 mV output amplitude with 50 Ohm receiver
resistor to VCC."

Features:

Maximum Input Clock Frequency > 10 GHz Typical

Maximum Input Data Rate > 10 Gb/s Typical

120 ps Typical Propagation Delay

35 ps Typical Rise and Fall Times

Positive CML Output with Operating Range: VCC = 2.375 V to 3.465 V with VEE
= 0 V

Negative CML Output with RSNECL or NECL Inputs with Operating Range: VCC =
0 V with VEE = -2.375 V to -3.465 V

CML Output Level; 400 mV Peak-to-Peak Output with 50 _ Receiver Resistor to
VCC

50 Ohm Internal Input and Output Termination Resistors

Compatible with Existing 2.5 V/3.3 V LVEP, EP, LVEL and SG Devices

VBB Reference Voltage Output

https://www.onsemi.com/PowerSolutions/product.do?id=NBSG16M
 
On Tue, 02 Jul 2019 12:43:45 -0700, John Larkin
<jjlarkin@highland_snip_technology.com> wrote:

On Tue, 2 Jul 2019 20:58:56 +0200, Gerhard Hoffmann <dk4xp@arcor.de
wrote:

Am 02.07.19 um 20:44 schrieb bitrex:
On 7/2/19 2:37 PM, bitrex wrote:
On 7/2/19 2:04 PM, John Larkin wrote:
On Tue, 2 Jul 2019 13:51:32 -0400, bitrex <user@example.net> wrote:

On 7/2/19 12:05 PM, John Larkin wrote:

We stock the MC10EP89, which is a great part, but it's kinda slow. I
was thinking that adding a couple of diodes, and maybe inductors,
could speed it up, given a single 3.3 volt supply. The next chip will
be CML compatible and doesn't need much swing.

https://www.dropbox.com/s/jqj9zc1oolzdoo4/ECL_Faster.JPG?raw=1



Can U bootstrap its supply from the outputs?

How would that work?



Are the outputs open-emitter e.g.:

https://www.allaboutcircuits.com/uploads/articles/Fig1m6292018.png

?

the idea is that the supply rails float up and down a bit so you get the
available-drive-power advantages of operating from a "virtual" 5 v
supply without actually making the output Q bases swing more than they
would @ 3.3

Would bootstrapping for Q not un-bootstrap for not_Q?
The EP89 already has double output voltage swing.

The double swing probably slows it down, especially on the negative
swing with the passive pulldown. Vlow is only about 1.5 volts above
ground, so the pulldown resistor current is low. The inductors might
improve the pulldown edge by sustaining the current for a while.

I've tried Spicing this, but I didn't have a believable ECL model...
just something I've hacked out of transistors.

Hints are that a resistor between the complementary ECL outputs is a
better speedup than the diodes.

Time to Dremel, I guess.
Click to expand...

Found this:

https://www.onsemi.com/pub/Collateral/AN1503-D.PDF

which includes the proper transistor models.



--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com
 
On 7/2/19 8:15 PM, Clifford Heath wrote:
On 3/7/19 10:11 am, whit3rd wrote:
On Tuesday, July 2, 2019 at 12:47:22 PM UTC-7, John Larkin wrote:
On Tue, 2 Jul 2019 20:58:56 +0200, Gerhard Hoffmann <dk4xp@arcor.de
wrote:

Would bootstrapping for Q not un-bootstrap for not_Q?

I've tried Spicing this, but I didn't have a believable ECL model...
just something I've hacked out of transistors.

I've heard (but never tried) that a lower power supply voltage speeds
ECL up (at some cost in logic margin, of course).   That should be
easy to
test, or simulate.

It makes sense that reducing the collector diode depletion layer would
do that.
Click to expand...

if it's used as a line-driver surely charging and discharging the
single-ended component of the line capacitance is the dominating factor?
 
On 3/7/19 5:43 am, John Larkin wrote:
On Tue, 2 Jul 2019 20:58:56 +0200, Gerhard Hoffmann <dk4xp@arcor.de
wrote:

Am 02.07.19 um 20:44 schrieb bitrex:
On 7/2/19 2:37 PM, bitrex wrote:
On 7/2/19 2:04 PM, John Larkin wrote:
On Tue, 2 Jul 2019 13:51:32 -0400, bitrex <user@example.net> wrote:

On 7/2/19 12:05 PM, John Larkin wrote:

We stock the MC10EP89, which is a great part, but it's kinda slow. I
was thinking that adding a couple of diodes, and maybe inductors,
could speed it up, given a single 3.3 volt supply. The next chip will
be CML compatible and doesn't need much swing.

https://www.dropbox.com/s/jqj9zc1oolzdoo4/ECL_Faster.JPG?raw=1



Can U bootstrap its supply from the outputs?

How would that work?



Are the outputs open-emitter e.g.:

https://www.allaboutcircuits.com/uploads/articles/Fig1m6292018.png

?

the idea is that the supply rails float up and down a bit so you get the
available-drive-power advantages of operating from a "virtual" 5 v
supply without actually making the output Q bases swing more than they
would @ 3.3

Would bootstrapping for Q not un-bootstrap for not_Q?
The EP89 already has double output voltage swing.

The double swing probably slows it down,
Click to expand...

The key is that current into the collectors is steered, so the common
path inductance doesn't matter, and the separate collector inductances
are really tiny because they're adjacent on-chip. So when one transistor
turns on, it doesn't have to wait long for current to start flowing into
its collector.

especially on the negative
swing with the passive pulldown. Vlow is only about 1.5 volts above
ground, so the pulldown resistor current is low. The inductors might
improve the pulldown edge by sustaining the current for a while.

I've tried Spicing this, but I didn't have a believable ECL model...
just something I've hacked out of transistors.

Hints are that a resistor between the complementary ECL outputs is a
better speedup than the diodes.

Time to Dremel, I guess.
Click to expand...
 
On Tuesday, July 2, 2019 at 12:47:22 PM UTC-7, John Larkin wrote:
On Tue, 2 Jul 2019 20:58:56 +0200, Gerhard Hoffmann <dk4xp@arcor.de
wrote:

Would bootstrapping for Q not un-bootstrap for not_Q?

I've tried Spicing this, but I didn't have a believable ECL model...
just something I've hacked out of transistors.
Click to expand...

I've heard (but never tried) that a lower power supply voltage speeds
ECL up (at some cost in logic margin, of course). That should be easy to
test, or simulate.
 
On 3/7/19 10:11 am, whit3rd wrote:
On Tuesday, July 2, 2019 at 12:47:22 PM UTC-7, John Larkin wrote:
On Tue, 2 Jul 2019 20:58:56 +0200, Gerhard Hoffmann <dk4xp@arcor.de
wrote:

Would bootstrapping for Q not un-bootstrap for not_Q?

I've tried Spicing this, but I didn't have a believable ECL model...
just something I've hacked out of transistors.

I've heard (but never tried) that a lower power supply voltage speeds
ECL up (at some cost in logic margin, of course). That should be easy to
test, or simulate.
Click to expand...

It makes sense that reducing the collector diode depletion layer would
do that.
 
On Wed, 3 Jul 2019 10:15:22 +1000, Clifford Heath <no.spam@please.net>
wrote:

On 3/7/19 10:11 am, whit3rd wrote:
On Tuesday, July 2, 2019 at 12:47:22 PM UTC-7, John Larkin wrote:
On Tue, 2 Jul 2019 20:58:56 +0200, Gerhard Hoffmann <dk4xp@arcor.de
wrote:

Would bootstrapping for Q not un-bootstrap for not_Q?

I've tried Spicing this, but I didn't have a believable ECL model...
just something I've hacked out of transistors.

I've heard (but never tried) that a lower power supply voltage speeds
ECL up (at some cost in logic margin, of course). That should be easy to
test, or simulate.

It makes sense that reducing the collector diode depletion layer would
do that.
Click to expand...

The output transistor collector goes to Vcc, and the base pulls up to
same, and the output is an emitter follower. The transistor hardly
knows how far away Vee is.

The external pulldown resistor current does change, depending on
Vcc-Vee. The change in pulldown current is worse for the big-swing
EP89 than it is for regular-swing parts.

I figure that the EP89 will get faster if I force the voltage swing
down.


--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com
 
John Larkin <jjlarkin@highland_snip_technology.com> wrote:

On Wed, 3 Jul 2019 10:15:22 +1000, Clifford Heath <no.spam@please.net
wrote:

On 3/7/19 10:11 am, whit3rd wrote:
On Tuesday, July 2, 2019 at 12:47:22 PM UTC-7, John Larkin wrote:
On Tue, 2 Jul 2019 20:58:56 +0200, Gerhard Hoffmann <dk4xp@arcor.de
wrote:

Would bootstrapping for Q not un-bootstrap for not_Q?

I've tried Spicing this, but I didn't have a believable ECL model...
just something I've hacked out of transistors.

I've heard (but never tried) that a lower power supply voltage speeds
ECL up (at some cost in logic margin, of course). That should be
easy to test, or simulate.

It makes sense that reducing the collector diode depletion layer would
do that.

The output transistor collector goes to Vcc, and the base pulls up to
same, and the output is an emitter follower. The transistor hardly
knows how far away Vee is.

The external pulldown resistor current does change, depending on
Vcc-Vee. The change in pulldown current is worse for the big-swing
EP89 than it is for regular-swing parts.

I figure that the EP89 will get faster if I force the voltage swing
down.
Click to expand...

Have you looked at the MC100EP16? 4 GHz

https://www.onsemi.com/pub/Collateral/MC10EP16-D.PDF

$8.42 Mouser

https://octopart.com/search?q=mc100ep16
 
Am 03.07.19 um 02:11 schrieb whit3rd:
On Tuesday, July 2, 2019 at 12:47:22 PM UTC-7, John Larkin wrote:
On Tue, 2 Jul 2019 20:58:56 +0200, Gerhard Hoffmann <dk4xp@arcor.de
wrote:

Would bootstrapping for Q not un-bootstrap for not_Q?

I've tried Spicing this, but I didn't have a believable ECL model...
just something I've hacked out of transistors.

I've heard (but never tried) that a lower power supply voltage speeds
ECL up (at some cost in logic margin, of course). That should be easy to
test, or simulate.
Click to expand...

I once fell on the nose with a 2.5/3.3 (maybe 3.3/5V) ECL chip.
The idea was to level shift a signal in a cheap way by abusing
the common mode range on the input/output side and shifting the
supply voltage by a diode drop or two.

That did not work. Re-checking the data sheet, there was 2v5 _OR_ 3V3.
They must have had a bandgap or whatever and switched operating points.
It did not work at all in between.
IIRC the chip was from Synergy.

cheers, Gerhard
 
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