Fake vcc and gnd

[aushitha]

If your code generates a fake vcc while synthesis,how do you overcome
it?In behaviourial modelling how can you know whether your code is
generating a fake vcc or not?Please let me know asap if anybody faced
this problem and overcame it.

 

[Mike Treseler]

aushitha wrote:

If your code generates a fake vcc while synthesis,how do you overcome
it?In behaviourial modelling how can you know whether your code is
generating a fake vcc or not?Please let me know asap if anybody faced
this problem and overcame it.

http://www.google.com/search?q=%22library+mapping+file%22+vhdl+edf+vcc+gnd

 

[aushitha]

If your code generates a fake vcc while synthesis,how do you overcome
it?In behaviourial modelling how can you know whether your code is
generating a fake vcc or not?Please let me know asap if anybody faced
this problem and overcame it.I am using Mentor Graphics - Leonardo
Spectrum,TSMC 0.35u tech.